Patents by Inventor Joost Wille

Joost Wille has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9275980
    Abstract: The invention relates to a method for embedding a non-embedded or bare LED network. To this end, the method of embedding a non-embedded LED network comprises the steps of: •(a) providing said non-embedded LED network associated with a continuous flexible support; •(b) applying in a continuous manner a flexible insulation layer on a liquid basis onto said non-embedded LED network associated with said continuous flexible support.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: March 1, 2016
    Assignee: SIOEN INDUSTRIES
    Inventors: Bert Groenendaal, Joost Wille
  • Publication number: 20140092598
    Abstract: The invention relates to a method for embedding a non-embedded or bare LED network. To this end, the method of embedding a non-embedded LED network comprises the steps of: •(a) providing said non-embedded LED network associated with a continuous flexible support; •(b) applying in a continuous manner a flexible insulation layer on a liquid basis onto said non-embedded LED network associated with said continuous flexible support.
    Type: Application
    Filed: January 12, 2012
    Publication date: April 3, 2014
    Inventors: Bert Groenendaal, Joost Wille
  • Patent number: 6518088
    Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: February 11, 2003
    Assignee: Siemens N.V. and Interuniversitair Micro-Electronica Centrum VZW
    Inventors: Marcel Heerman, Joost Wille, Jozef Puymbroeck Van, Jean Roggen, Eric Beyne, Rita Hoof Van
  • Patent number: 6249048
    Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: June 19, 2001
    Assignees: Siemens N.V., Interuniversitair Micro-Electronica
    Inventors: Marcel Heerman, Joost Wille, Jozef Puymbroeck Van, Jean Roggen, Eric Beyne, Rita Hoof Van
  • Patent number: 5929516
    Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: July 27, 1999
    Assignees: Siemens N.V., Interuniversitair Micro-Electronica Centrum VZW
    Inventors: Marcel Heerman, Joost Wille, Jozef Van Puymbroeck, Jean Roggen, Eric Beyne, Rita Van Hoof