Patents by Inventor Jordan Chin

Jordan Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953974
    Abstract: An information handling system includes a compute express link (CXL) device coupled to a processor by a PCIe/CXL link. The processor initiates a link training on the PCIe/CXL link, determines that the PCIe/CXL link failed to train to a CXL link signaling rate, trains the PCIe/CXL link as a PCIe link in response to determining that the PCIe/CXL link failed to train to the CXL link signaling rate, and operates the CXL device as a PCIe device only in response to training the PCIe/CXL link as a PCIe link.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 9, 2024
    Assignee: Dell Products L.P.
    Inventors: Isaac Q. Wang, Stuart Allen Berke, Jordan Chin
  • Publication number: 20240070328
    Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may perform various operations using hardware devices. The operation of the hardware devices may be updated by storing data in secure locations of the hardware devices. To store data in the secure locations, a delayed write may be stored in an unsecure storage location of a hardware devices during an unsecure phase of operation of a data processing system. Once the data processing system enters a more secure phase of operation, the delayed write may be validated and used to update the data in the secure locations during the more secure phase of operation of the data processing system.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: JORDAN CHIN, ISAAC QIN WANG
  • Patent number: 11914472
    Abstract: An information handling system includes a memory module, a memory controller coupled to the memory controller by a memory bus, and an expansion memory device coupled to the memory controller by a data communication interface. The memory controller receives user data, calculates error correction code (ECC) data for the user data, determines metadata related to the user data, writes the user data and the ECC data to the memory module via the memory bus, and stores the metadata to the expansion memory device with a transaction on the data communication interface.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: February 27, 2024
    Assignee: Dell Products L.P.
    Inventors: Kevin Matthew Cross, Jordan Chin
  • Publication number: 20240036744
    Abstract: An information handling system includes a processor and a memory module. The memory module operates with a base set of functions and is configurable to operate with an expanded set of functions. The memory module includes a data storage location to store expansion capability certificates that specify subsets of the expanded set of functions to enable. The processor creates an expansion capability certificate that includes a first unique identifier of the information handling system, a second unique identifier of the memory module, and a subset of the expanded set of functions, and provides the expansion capability certificate to the memory module. The memory module receives the first expansion capability certificate, stores the expansion capability certificate to the data storage location, and enables the subset of the expanded set of functions in response to storing the expansion capability certificate.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: Milton Taveira, Isaac Q. Wang, Jordan Chin
  • Publication number: 20240028685
    Abstract: A memory module includes first and second data storage locations. The first data storage location stores an expansion license. The memory module operates with a base set of functions, and is configurable to operate with an expanded set of functions based on the expansion license. The second data storage location stores an expansion capability certificate that is signed by an information handling system and includes a subset of the expanded set of functions that are enabled by the expansion capability certificate. The memory module determines that the memory module is installed into the information handling system based on the expansion capability certificate, and enables the subset of the expanded set of functions in response to determining that the memory module is installed into the information handling system.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 25, 2024
    Inventors: Milton Taveira, Isaac Q. Wang, Jordan Chin
  • Publication number: 20240028769
    Abstract: A memory module includes first and second data storage locations. The memory module operates with a full set of functions. When the first data storage location stores an expansion license, the memory module is configurable to operate with a subset of the full set of functions disabled. The second data storage location stores an expansion capability certificate, that is signed by an information handling system and includes a first subset of the full set of functions that are disabled by the expansion capability certificate. The memory module determines that the memory module is installed into the information handling system based on the expansion capability certificate, and disables the first subset of the full set of functions in response to determining that the memory module is installed into the information handling system.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 25, 2024
    Inventors: Milton Taveira, Isaac Q. Wang, Jordan Chin
  • Publication number: 20240028438
    Abstract: An information handling system includes a processor and a Compute express link (CXL) device. The CXL device is coupled to the processor by a Peripheral Component Interface-Express (PCIe)/CXL link. The processor initiates a link training on the PCIe/CXL link, determines that the PCIe/CXL link failed to train to a first data rate, trains the PCIe/CXL link to a second data rate in response to determining that the PCIe/CXL link failed to train to the first data rate, and operates the CXL device in a CXL mode in response to training the PCIe/CXL link to the second data rate.
    Type: Application
    Filed: July 19, 2022
    Publication date: January 25, 2024
    Inventors: Isaac Q. Wang, Stuart Allen Berke, Jordan Chin
  • Publication number: 20240020190
    Abstract: An information handling system includes a compute express link (CXL) device coupled to a processor by a PCIe/CXL link. The processor initiates a link training on the PCIe/CXL link, determines that the PCIe/CXL link failed to train to a CXL link signaling rate, trains the PCIe/CXL link as a PCIe link in response to determining that the PCIe/CXL link failed to train to the CXL link signaling rate, and operates the CXL device as a PCIe device only in response to training the PCIe/CXL link as a PCIe link.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: Isaac Q. Wang, Stuart Allen Berke, Jordan Chin
  • Publication number: 20240020174
    Abstract: An information handling system includes processing nodes, a compute express link (CXL) switch, and CXL devices. A workload orchestrator receives a workload to be instantiated on a particular one of the processing nodes, determines a set of resources associated with the workload, selects a particular one of the CXL devices to be used based upon the set or resources, and launches the workload on the processing node.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 18, 2024
    Inventors: Yunfan Han, Isaac Q. Wang, Jordan Chin
  • Publication number: 20240020195
    Abstract: An information handling system includes a memory module, a memory controller coupled to the memory controller by a memory bus, and an expansion memory device coupled to the memory controller by a data communication interface. The memory controller receives user data, calculates error correction code (ECC) data for the user data, determines metadata related to the user data, writes the user data and the ECC data to the memory module via the memory bus, and stores the metadata to the expansion memory device with a transaction on the data communication interface.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: Kevin Matthew Cross, Jordan Chin
  • Publication number: 20240008181
    Abstract: An interface apparatus for installing an add-in module to an information handling system includes the add-in module and an add-in module socket. The add-in module includes a card-edge connector on a first edge of the add-in module, and an electrical contact finger on a second edge of the add-in module. The add-in module socket is affixed to the information handling system and receives the add-in module. The add-in module socket includes a card-edge connector interface for receiving the card edge connector, and a slot channel for receiving the second edge of the add-in module. The slot channel includes an electrical contact pad configured such that, when the add-in module is installed into the add-in module socket, a current is provided between the add-in module socket and the add-in module through the electrical contact pad and the electrical contact finger.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Isaac Q. Wang, Jordan Chin, James L. Petivan, III
  • Publication number: 20240008216
    Abstract: An information handling system includes an enclosure configured to include a duct to channel air flow in the enclosure over a first component of the information handling system. A duct sensor determines if the duct is included in the enclosure. The system receives an indication from the duct sensor that the duct is not included in the information handling system, determines that the first component is in a hot spot in the enclosure based upon the indication, and redirects a workload instantiated on the first component to a second component of the information handling system.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Inventors: Jordan Chin, Isaac Q. Wang
  • Publication number: 20240006827
    Abstract: An information handling system includes a plug-in connector interface and an accelerator module installed into the plug-in connector interface. The plug-in connector interface is located at a location on a printed circuit board of the information handling system. The information handling system instantiates a workload on a processor, and allocates a processing resource of the accelerator module to the workload based upon the plug-in connector interface being located at the location.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Isaac Q. Wang, Jordan Chin
  • Publication number: 20240004439
    Abstract: An interface apparatus for installing an add-in module to an information handling system includes the add-in module and an add-in module socket. The add-in module includes a card-edge connector on a first edge of the add-in module, and an electrical contact finger on a second edge of the add-in module. The add-in module socket is affixed to the information handling system and receives the add-in module. The add-in module socket includes a card-edge connector interface for receiving the card edge connector, and a slot channel for receiving the second edge of the add-in module. The slot channel includes an electrical contact pad configured such that, when the add-in module is installed into the add-in module socket, a current is provided between the add-in module socket and the add-in module through the electrical contact pad and the electrical contact finger.
    Type: Application
    Filed: February 6, 2023
    Publication date: January 4, 2024
    Inventors: Isaac Q. Wang, Jordan Chin, James L. Petivan, III
  • Publication number: 20240006791
    Abstract: An interface apparatus for installing memory modules to an information handling system includes a riser card and an adapter. The riser card includes a first card-edge connector on a first edge of the riser card, and a second card-edge connector on a second edge of the riser card. The first card-edge connector is associated with a first interface and the second card-edge connector is associated with a second interface. The adapter includes a first socket on a first side of the adapter, and a second socket on a second side of the adapter opposite to the first side. The first socket and the second socket are associated with the second interface. The first socket is configured to receive the second card-edge connector of the riser card. The second socket is configured to receive a memory module.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Inventors: Isaac Q. Wang, Jordan Chin, James L. Petivan, III
  • Patent number: 11829635
    Abstract: Managing a memory element of a memory module, including identifying a PPR listing for the memory element that is stored at a SPD of the memory module; identifying an event associated with a memory address location of the memory element during runtime of the memory module and in response accessing the SPD to write data to the PPR listing indicating the memory address location of the memory element associated with the event; determining whether the PPR listing has available space to store the data indicating the memory address location of the memory element associated with the event; determining that the PPR listing has available space to store the data indicating the memory address location of the memory element associated with the event, and in response, storing the data indicating the memory address location of the memory element associated with the event at the PPR listing at the SPD.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: November 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Kevin M. Cross, Jordan Chin, Isaac Qin Wang
  • Patent number: 11755475
    Abstract: An information handling system includes first and second memory modules, and a central processing unit. The first memory module includes one or more memory ranks of memory devices, and a first plurality of thermal sensors. The second memory module includes one or more memory ranks of memory devices, and a second plurality of thermal sensors. The central processing unit receives first thermal telemetry data for the first memory module from the first thermal sensors, and second thermal telemetry data for the second memory module from the second thermal sensors. In response to the reception of the first thermal telemetry data, the central processing unit determines a first localized temperature of a first memory rank. In response to the first localized temperature exceeding a threshold temperature, the central processing unit re-maps access of data from the first memory rank to a second memory rank.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: September 12, 2023
    Assignee: Dell Products L.P.
    Inventors: Balaji Bapu Gururaja Rao, Jordan Chin, Stuart Allen Berke
  • Patent number: 11742054
    Abstract: A controller of an information handling system may detect a power fault event for one or more of a plurality of memories configured to operate in a memory mirroring mode. The controller may deactivate the one or more of the plurality of memories by mapping the one or more of the plurality of memories out from usage without rebooting the information handling system based, at least in part, on the detection of the power fault event and the received notification.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: August 29, 2023
    Assignee: Dell Products L.P.
    Inventors: Jordan Chin, Timothy M. Lambert
  • Patent number: 11675645
    Abstract: An information handling system includes a processor and a basic input/output system (BIOS). The processor executes an operating system, and detects a corrected error from a memory controller of the information handling system. In response, the processor generates a system management interrupt (SMI). In response to the SMI the BIOS executes a SMI handler. The SMI handler detects a row of the corrected error within a dual inline memory module (DIMM) of the information handling system, and determines whether an entry for the row is located within a hash table. In response to the entry for the row being located within the hash table, the SMI handler increments an error count in a field of the entry for the row. Otherwise, the SMI handler adds a new entry for the row to the hash table, and increments an error count in a field of the new entry for the row.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: June 13, 2023
    Assignee: Dell Products L.P.
    Inventors: David K. Chalfant, Jordan Chin
  • Publication number: 20230130808
    Abstract: Managing a memory element of a memory module, including identifying a PPR listing for the memory element that is stored at a SPD of the memory module; identifying an event associated with a memory address location of the memory element during runtime of the memory module and in response accessing the SPD to write data to the PPR listing indicating the memory address location of the memory element associated with the event; determining whether the PPR listing has available space to store the data indicating the memory address location of the memory element associated with the event; determining that the PPR listing has available space to store the data indicating the memory address location of the memory element associated with the event, and in response, storing the data indicating the memory address location of the memory element associated with the event at the PPR listing at the SPD.
    Type: Application
    Filed: October 21, 2021
    Publication date: April 27, 2023
    Inventors: Kevin M. Cross, Jordan Chin, Isaac Qin Wang