Patents by Inventor Jordan R Keuseman
Jordan R Keuseman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9746909Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.Type: GrantFiled: February 25, 2014Date of Patent: August 29, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Patent number: 9740275Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.Type: GrantFiled: June 23, 2014Date of Patent: August 22, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Patent number: 9684366Abstract: A zone power cap for a power management zone that defines a limit of power consumption for the power management zone is determined. The power management zone comprises a plurality of components, wherein the power management zone is associated with a controller. A set of one or more characteristics of a workload associated with the power management zone is determined. A component power cap for one or more of the plurality of components is set based, at least in part, on the set of one or more characteristics of the workload and the zone power cap.Type: GrantFiled: June 23, 2014Date of Patent: June 20, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Patent number: 9268347Abstract: A method and apparatus are provided for implementing dynamic regulator output current limiting. An input power to the regulator is measured, and the measured input power is related to a regulator output current and a regulator over current trip point, and dynamically used for providing dynamic regulator output current limiting.Type: GrantFiled: February 12, 2013Date of Patent: February 23, 2016Assignee: International Business Machines CorporationInventors: Kevin R. Covi, Patrick K. Egan, James D. Jordan, Jordan R. Keuseman, Michael L. Miller, Guillermo J. Silva, Malcolm S. Allen-Ware
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Publication number: 20150241947Abstract: A zone power cap for a power management zone that defines a limit of power consumption for the power management zone is determined. The power management zone comprises a plurality of components, wherein the power management zone is associated with a controller. A set of one or more characteristics of a workload associated with the power management zone is determined. A component power cap for one or more of the plurality of components is set based, at least in part, on the set of one or more characteristics of the workload and the zone power cap.Type: ApplicationFiled: June 23, 2014Publication date: August 27, 2015Inventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Publication number: 20150241943Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.Type: ApplicationFiled: February 25, 2014Publication date: August 27, 2015Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J. Silva
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Publication number: 20150241946Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.Type: ApplicationFiled: June 23, 2014Publication date: August 27, 2015Inventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J. Silva
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Publication number: 20150241944Abstract: A zone power cap for a power management zone that defines a limit of power consumption for the power management zone is determined. The power management zone comprises a plurality of components, wherein the power management zone is associated with a controller. A set of one or more characteristics of a workload associated with the power management zone is determined. A component power cap for one or more of the plurality of components is set based, at least in part, on the set of one or more characteristics of the workload and the zone power cap.Type: ApplicationFiled: February 25, 2014Publication date: August 27, 2015Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Publication number: 20140225586Abstract: A method and apparatus are provided for implementing dynamic regulator output current limiting. An input power to the regulator is measured, and the measured input power is related to a regulator output current and a regulator over current trip point, and dynamically used for providing dynamic regulator output current limiting.Type: ApplicationFiled: February 12, 2013Publication date: August 14, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin R. Covi, Patrick K. Egan, James D. Jordan, Jordan R. Keuseman, Michael L. Miller, Guillermo J. Silva, Malcolm S. Allen-Ware
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Patent number: 8415935Abstract: A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.Type: GrantFiled: May 31, 2012Date of Patent: April 9, 2013Assignee: International Business Machines CorporationInventors: Patrick K. Egan, Jordan R. Keuseman, Michael L. Miller
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Publication number: 20130063109Abstract: A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.Type: ApplicationFiled: May 31, 2012Publication date: March 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick K. Egan, Jordan R. Keuseman, Michael L. Miller
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Patent number: 8278888Abstract: A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated.Type: GrantFiled: September 12, 2011Date of Patent: October 2, 2012Assignee: International Business Machines CorporationInventors: Patrick K. Egan, Jordan R. Keuseman, Michael L. Miller
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Patent number: 8108823Abstract: A computer implemented method employs software on a system for generating a logical representation of an electronic circuit undergoing a design. A predetermined grid for the circuit being designed is selected through interaction with the user through a graphical user interface. An input file defines objects to be plotted to the grid, and is read into a computer system. Objection locations relative to the grid, and connections between objects are checked and adjustments made by moving objects as necessary to align with the grid and to ensure connections between the objects. A design file of the adjusted logical representation is written for use in completing a circuit design.Type: GrantFiled: June 18, 2008Date of Patent: January 31, 2012Assignee: International Business Machines CorporationInventors: Jonathan M. Allen, Richard Holmquist, Mark J. Jeanson, Jordan R. Keuseman, George R. Zettles, IV
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Publication number: 20120001602Abstract: A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated.Type: ApplicationFiled: September 12, 2011Publication date: January 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick K. Egan, Jordan R. Keuseman, Michael L. Miller
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Patent number: 8040115Abstract: A power regulation circuit includes at least a first regulator connected to a second regulator in series forming a first regulator pair and a third regulator connected to a fourth regulator in series forming a second regulator pair. The first regulator pair is connected in parallel with the second regulator pair. Each individual regulator is configured to separately regulate an input voltage to a predetermined regulated output voltage. The second regulator pair regulates the input voltage if a short condition occurs within the first regulator pair and the second and fourth regulators each regulate the input voltage if an open condition occurs within the first or third regulator respectively.Type: GrantFiled: August 4, 2009Date of Patent: October 18, 2011Assignee: International Business Machines CorporationInventors: Patrick K Egan, Jordan R Keuseman, Michael L Miller
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Publication number: 20110031946Abstract: A power regulation circuit includes at least a first regulator connected to a second regulator in series forming a first regulator pair and a third regulator connected to a fourth regulator in series forming a second regulator pair. The first regulator pair is connected in parallel with the second regulator pair. Each individual regulator is configured to separately regulate an input voltage to a predetermined regulated output voltage. The second regulator pair regulates the input voltage if a short condition occurs within the first regulator pair and the second and fourth regulators each regulate the input voltage if an open condition occurs within the first or third regulator respectively.Type: ApplicationFiled: August 4, 2009Publication date: February 10, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick K. Egan, Jordan R. Keuseman, Michael L. Miller
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Publication number: 20090319974Abstract: A computer implemented method employs software on a system for generating a logical representation of an electronic circuit undergoing a design. A predetermined grid for the circuit being designed is selected through interaction with the user through a graphical user interface. An input file defines objects to be plotted to the grid, and is read into a computer system. Objection locations relative to the grid, and connections between objects are checked and adjustments made by moving objects as necessary to align with the grid and to ensure connections between the objects. A design file of the adjusted logical representation is written for use in completing a circuit design.Type: ApplicationFiled: June 18, 2008Publication date: December 24, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jonathan M. Allen, Richard Holmquist, Mark J. Jeanson, Jordan R. Keuseman, George R. Zettles, IV
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Publication number: 20090147827Abstract: Implementing spread spectrum using digital signal processing techniques. An incoming clock signal is received and sampled using a programmable sampling mechanism to generate a plurality of signal data points included in a sampled signal. The sampled signal is conditioned using a programmable signal conditioning mechanism capable of performing at least one of: reducing a cycle to cycle jitter of the sampled signal; or adjusting the sampled signal to a base frequency. The signal data points are processed and spread across a band of frequencies using a programmable digital signal processor to adjust at least one of: (a) an amplitude, (b) a phase shift, or (c) a frequency shift; for each of a plurality of respective signal data points at a plurality of corresponding frequencies in the band of frequencies. An output waveform is constructed from the processed and spread signal data points, wherein the output waveform constitutes a clock output signal.Type: ApplicationFiled: December 6, 2007Publication date: June 11, 2009Inventors: Richard Holmquist, Jordan R. Keuseman, David R. Motschman, George R. Zettles, IV