Patents by Inventor Jordan Smith

Jordan Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8769867
    Abstract: Systems, methods and media for generating fluid flow in an algae cultivation pond are disclosed. Circulation of fluid in the algae cultivation pond is initiated via at least one jet. The circulation of fluid generates a velocity of fluid flow of at least ten centimeters per second in the algae cultivation pond. A head is provided to the at least one jet that overcomes a head loss associated with the velocity of fluid flow of at least ten centimeters per second in the algae cultivation pond.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: July 8, 2014
    Assignee: Aurora Algae, Inc.
    Inventors: Mehran Parsheh, Jordan Smith, Stephen Strutner, Guido Radaelli
  • Patent number: 8357876
    Abstract: A method of arc welding a first metal piece to a second metal piece includes the steps of extend a welding head between the space between first and second metal pieces, bending a filler wire, passing the bent filler wire through the welding head such that an end of the bent filler wire extends in a direction toward a surface of one of the first and second metal pieces, and arc welding the end portion of the bent filler wire onto the surface of the metal piece. The method further includes rotating the end of the bent filler wire toward another surface of the metal pieces and arc welding the of end of the rotated bent filler wire onto the surface of the another metal piece. The welding head travels along the space between the first and second metal pieces as the step of arc welding occurs.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: January 22, 2013
    Assignee: ARC Specialties, Inc.
    Inventors: Daniel Allford, Randy Ellington, Jordan Smith
  • Patent number: 8356166
    Abstract: Minimizing code duplication in an unbounded transactional memory system. A computing apparatus including one or more processors in which it is possible to use a set of common mode-agnostic TM barrier sequences that runs on legacy ISA and extended ISA processors, and that employs hardware filter indicators (when available) to filter redundant applications of TM barriers, and that enables a compiled binary representation of the subject code to run correctly in any of the currently implemented set of transactional memory execution modes, including running the code outside of a transaction, and that enables the same compiled binary to continue to work with future TM implementations which may introduce as yet unknown future TM execution modes.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: January 15, 2013
    Assignee: Microsoft Corporation
    Inventors: Ali-Reza Adl-Tabatabai, Bratin Saha, Gad Sheaffer, Vadim Bassin, Robert Y. Geva, Martin Taillefer, Darek Mihocka, Burton Jordan Smith, Jan Gray
  • Patent number: 8285708
    Abstract: Described is a technology comprising a query processing pipeline in which a SPARQL query is processed into an intermediate LINQ query, which is then processed by a LINQ provider. The LINQ provider decides which instructions correspond to flat database queries, and routes those instructions a database engine (e.g., SQL server) for querying a database. Other instructions are provided to a reasoning engine for processing, e.g., by performing a graph traversal and/or database queries. The pipeline may include a parser that parses the query into an abstract syntax tree, and an optimizer that processes the abstract syntax tree into a LINQ query, including by reordering LINQ instructions and/or associating a flag with each of the instructions that indicates whether to query the database or provide the instruction to a reasoning engine.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: October 9, 2012
    Assignee: Microsoft Corporation
    Inventors: Stuart M. Bowers, David Brian Wecker, Chris D. Karkanias, Burton Jordan Smith
  • Patent number: 8161247
    Abstract: Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: April 17, 2012
    Assignee: Microsoft Corporation
    Inventors: Jan Gray, David Callahan, Burton Jordan Smith, Gad Sheaffer, Ali-Reza Adl-Tabatabai, Bratin Saha
  • Publication number: 20100325948
    Abstract: Systems, methods and media for carbonation of fluid in an algae cultivation pond via the use of jets are disclosed. Carbon dioxide is provided to a pressurized fluid. A jet of carbonated fluid is generated from the pressurized fluid and the carbon dioxide. Circulation of the fluid in the algae cultivation pond is initiated via the jet of carbonated fluid.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 30, 2010
    Inventors: Mehran Parsheh, Jordan Smith, Stephen Strutner, Guido Radaelli
  • Publication number: 20100332771
    Abstract: Private or shared read-only memory regions. One embodiment may be practiced in a computing environment including a plurality of agents. A method includes acts for declaring one or more memory regions private to a particular agent or shared read only amongst agents by having software utilize processor level instructions to specify to hardware the private or shared read only memory address regions. The method includes an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents. As a result of an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents, a hardware component monitoring the one or more memory regions for conflicting accesses or prevents conflicting accesses on the one or more memory regions.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Jan Gray, David Callahan, Burton Jordan Smith, Gad Sheaffer, Ali-Reza Adl-Tabatabai
  • Publication number: 20100332768
    Abstract: A computing system includes a number of threads. The computing system is configured to allow for monitoring and testing memory blocks in a cache memory to determine effects on memory blocks by various agents. The system includes a processor. The processor includes a mechanism implementing an instruction set architecture including instructions accessible by software. The instructions are configured to: set per-hardware-thread, for a first thread, memory access monitoring indicators for a plurality of memory blocks, and test whether any monitoring indicator has been reset by the action of a conflicting memory access by another agent. The processor further includes mechanism configured to: detect conflicting memory accesses by other agents to the monitored memory blocks, and upon such detection of a conflicting access, reset access monitoring indicators corresponding to memory blocks having conflicting memory accesses, and remember that at least one monitoring indicator has been so reset.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Jan Gray, David Callahan, Burton Jordan Smith, Gad Sheaffer, Ali-Reza Adl-Tabatabai, Vadim Bassin, Robert Y. Geva
  • Publication number: 20100332808
    Abstract: Minimizing code duplication in an unbounded transactional memory system. A computing apparatus including one or more processors in which it is possible to use a set of common mode-agnostic TM barrier sequences that runs on legacy ISA and extended ISA processors, and that employs hardware filter indicators (when available) to filter redundant applications of TM barriers, and that enables a compiled binary representation of the subject code to run correctly in any of the currently implemented set of transactional memory execution modes, including running the code outside of a transaction, and that enables the same compiled binary to continue to work with future TM implementations which may introduce as yet unknown future TM execution modes.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Ali-Reza Adl-Tabatabai, Bratin Saha, Gad Sheaffer, Vadim Bassin, Robert Y. Geva, Martin Taillefer, Darek Mihocka, Burton Jordan Smith, Jan Gray
  • Publication number: 20100332753
    Abstract: Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Jan Gray, David Callahan, Burton Jordan Smith, Gad Sheaffer, Ali-Reza Adl-Tabatabai, Bratin Saha
  • Publication number: 20100314324
    Abstract: A clarification system may comprise a channel having an inlet and an outlet, a length, bottom, and a height sufficient to contain a liquid having a depth. The clarification system may include one or more gas injectors disposed within the channel, configured to inject gas bubbles into a suspension flowing in the channel. In some embodiments, at least one gas injector injects gas bubbles having average or median size that does not exceed 100 microns in diameter. Some gas injectors inject bubbles having mean size below 50 microns. Some gas injectors inject gas via the precipitation of gas bubbles from a supersaturated liquid including a dissolved gas. Certain embodiments may be configured to form a quiet zone, typically near the top of the flowing suspension, in which turbulence may be minimized or substantially eliminated. Certain systems include a plurality of gas injectors disposed at different lengths along the channel.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 16, 2010
    Inventors: David Rice, Mehran Parsheh, Jordan Smith, Guido Radaelli
  • Publication number: 20100260618
    Abstract: Systems, methods and media for generating fluid flow in an algae cultivation pond are disclosed. Circulation of fluid in the algae cultivation pond is initiated via at least one jet. The circulation of fluid generates a velocity of fluid flow of at least ten centimeters per second in the algae cultivation pond. A head is provided to the at least one jet that overcomes a head loss associated with the velocity of fluid flow of at least ten centimeters per second in the algae cultivation pond.
    Type: Application
    Filed: June 16, 2009
    Publication date: October 14, 2010
    Inventors: Mehran Parsheh, Jordan Smith, Stephen Strutner, Guido Radaelli
  • Publication number: 20100114885
    Abstract: Described is a technology comprising a query processing pipeline in which a SPARQL query is processed into an intermediate LINQ query, which is then processed by a LINQ provider. The LINQ provider decides which instructions correspond to flat database queries, and routes those instructions a database engine (e.g., SQL server) for querying a database. Other instructions are provided to a reasoning engine for processing, e.g., by performing a graph traversal and/or database queries. The pipeline may include a parser that parses the query into an abstract syntax tree, and an optimizer that processes the abstract syntax tree into a LINQ query, including by reordering LINQ instructions and/or associating a flag with each of the instructions that indicates whether to query the database or provide the instruction to a reasoning engine.
    Type: Application
    Filed: June 16, 2009
    Publication date: May 6, 2010
    Applicant: Microsoft Corporation
    Inventors: Stuart M. Bowers, David Brian Wecker, Chris D. Karkanias, Burton Jordan Smith
  • Publication number: 20100106758
    Abstract: A system described herein includes a selector component that receives input data that is desirably transformed by way of a Discrete Fourier Transform, wherein the selector component selects one of a plurality of algorithms for computing the Discrete Fourier Transform from a library based at least in part upon a size of the input function. An evaluator component executes the selected one of the plurality of algorithms to compute the Discrete Fourier Transform, wherein the evaluator component causes leverages shared memory of a processor to compute the Discrete Fourier Transform.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 29, 2010
    Applicant: Microsoft Corporation
    Inventors: Naga K. Govindaraju, David Brandon Lloyd, Yuri Dotsenko, Burton Jordan Smith, Jon L. Manferdelli
  • Publication number: 20080036760
    Abstract: A method, a data storage medium storing a computer program, and a data processing system are disclosed to process data comprised of a triangulated mesh representation of an object. The method includes establishing a continuous bijective mapping between a first triangle mesh representation of the object and a second polygonal mesh representation of the object during the application of at least one mesh connectivity operation selected from a set of mesh connectivity operations. Establishing the mapping includes using a set of charts where an individual chart encodes a mapping of a single face of the second polygonal mesh representation to a plurality of triangles of the first triangle mesh representation that the single face of the second mesh representation overlaps with parametrically. The method further includes updating at least one chart of the set of charts in response to each application of the at least one mesh connectivity operation.
    Type: Application
    Filed: October 16, 2007
    Publication date: February 14, 2008
    Inventors: Jordan Smith, Ioana Boier-Martin
  • Publication number: 20060164415
    Abstract: A method, a data storage medium storing a computer program, and a data processing system are disclosed to process data comprised of a triangulated mesh representation of an object. The method includes establishing a continuous bijective mapping between a first triangle mesh representation of the object and a second polygonal mesh representation of the object during the application of at least one mesh connectivity operation selected from a set of mesh connectivity operations. Establishing the mapping includes using a set of charts where an individual chart encodes a mapping of a single face of the second polygonal mesh representation to a plurality of triangles of the first triangle mesh representation that the single face of the second mesh representation overlaps with parametrically. The method further includes updating at least one chart of the set of charts in response to each application of the at least one mesh connectivity operation.
    Type: Application
    Filed: January 26, 2005
    Publication date: July 27, 2006
    Inventors: Jordan Smith, Ioana Boier-Martin