Patents by Inventor Jorg Stender

Jorg Stender has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory having a redundancy circuit for word lines and method for operating the memory
    Publication number: 20020021604
    Abstract: A redundancy circuit for a semiconductor memory having word lines and redundant word lines is described. The redundancy circuit activates the word line at the same time as checking to determine whether the applied address per word line is the address of a defective word line, and deactivates the word line again if it is determined that the applied address is the address of a defective word line.
    Type: Application
    Filed: August 8, 2001
    Publication date: February 21, 2002
    Inventor: Jorg Stender