Patents by Inventor Jorge A. Suris Pletri

Jorge A. Suris Pletri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7902866
    Abstract: A method, and system, for reconfiguring an FPGA which has a static region and a dynamic region is provided. The method includes the steps of: (a) providing a dynamic module library having information of predetermined modules; (b) receiving a reconfiguration request external to the FPGA; (c) computing reconfiguration of the FPGA at a predetermined location using predetermined module information from the dynamic module library and the reconfiguration request, and generating reconfigurable partial bitstreams; and (d) sending partial bitstreams from the predetermined location to the FPGA to perform the reconfiguration.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: March 8, 2011
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Cameron Patterson, Peter Athanas, John K. Bowen, Timothy G. Dunham, Justin D. Rice, Matthew T. Shelburne, Jorge A. Suris Pletri, Jonathan Graf