Patents by Inventor Jorge Eduardo Martinez-Vargas, JR.

Jorge Eduardo Martinez-Vargas, JR. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8923007
    Abstract: In at least one embodiment, a circuit board assembly that includes a printed circuit board is provided. The printed circuit board includes a top surface and a bottom surface for supporting at least one through-hole electrical component. The printed circuit board defines at least one component hole extending from the top surface to the bottom surface for receiving the at least one through-hole electrical component. The at least one component hole includes a first section having a first diameter and a second section having a second diameter. The first diameter is different from the second diameter. Each of the first and the second sections are configured to receive solder paste for forming a solder joint with the at least one through-hole electrical component.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: December 30, 2014
    Assignee: Oracle America, Inc.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, Jr., Michael Clifford Freda
  • Patent number: 8431831
    Abstract: A via is provided on a printed circuit board with at least one additional depression encompassing the via, such that the via passes through a portion of the depression. Solder can pool in the depression, allowing for a stronger mechanical bond and eliminating many issues with respect to a lack of coplanarity between a lead and the printed circuit board. The depression can be provided with plugged and unplugged vias, and improves the mountings associated with both.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: April 30, 2013
    Assignee: Oracle America, Inc.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, Jr., Michael Clifford Freda
  • Publication number: 20110154659
    Abstract: Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.
    Type: Application
    Filed: January 4, 2011
    Publication date: June 30, 2011
    Applicant: ORACLE AMERICA, INC.
    Inventors: James David Britton, Jorge Eduardo Martinez-Vargas, JR.
  • Publication number: 20100155106
    Abstract: Implementations of the present invention may involve methods for providing an optical differentiation on a printed circuit board to assist in identifying a missing or improperly mounted component. The optical differentiation may be such that, when a component of the board is missing or improperly attached to the board, a distinct optical difference is created on the board in the visible or non-visible spectrum. Several implementations may create a visible color difference, a non-visible mark, a recognizable shape, texture change, cross hatching or other form of physical modification beneath the component or on the printed circuit board. Other implementations may include the optical differentiation within a silk-screen of the board or on an internal layer of the board.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Applicant: Sun Microsystems, Inc.
    Inventors: James David Britton, Thomas J. Pelc, Jorge Eduardo Martinez-Vargas, JR.
  • Publication number: 20100084178
    Abstract: A via is provided on a printed circuit board with at least one additional depression encompassing the via, such that the via passes through a portion of the depression. Solder can pool in the depression, allowing for a stronger mechanical bond and eliminating many issues with respect to a lack of coplanarity between a lead and the printed circuit board. The depression can be provided with plugged and unplugged vias, and improves the mountings associated with both.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 8, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, JR., Michael Clifford Freda
  • Publication number: 20100085717
    Abstract: In at least one embodiment, a circuit board assembly that includes a printed circuit board is provided. The printed circuit board includes a top surface and a bottom surface for supporting at least one through-hole electrical component. The printed circuit board defines at least one component hole extending from the top surface to the bottom surface for receiving the at least one through-hole electrical component. The at least one component hole includes a first section having a first diameter and a second section having a second diameter. The first diameter is different from the second diameter. Each of the first and the second sections are configured to receive solder paste for forming a solder joint with the at least one through-hole electrical component.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 8, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, JR., Michael Clifford Freda