Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.

Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.

Abstract: A system for testing semiconductor components contained on a substrate, such as a wafer, a panel, a leadframe or a module, includes an interconnect configured to electrically engage all of the components on the substrate at the same time. The interconnect includes a switching network configured to selectively apply test signals to selected components, to electrically isolate defective components and to transmit test signals from selected groups of components. The system also includes a test apparatus, such as a wafer prober or a carrier for handling the substrate. A method for testing includes the steps of providing the interconnect having the switching network, and controlling test signals to the components using the switching network to perform various test procedures, such as functionality tests, parametric tests and burn-in tests.

Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.

Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.

Abstract: A system for testing semiconductor components contained on a substrate, such as a wafer, a panel, a leadframe or a module, includes an interconnect configured to electrically engage all of the components on the substrate at the same time. The interconnect includes a switching network configured to selectively apply test signals to selected components, to electrically isolate defective components and to transmit test signals from selected groups of components. The system also includes a test apparatus, such as a wafer prober or a carrier for handling the substrate. A method for testing includes the steps of providing the interconnect having the switching network, and controlling test signals to the components using the switching network to perform various test procedures, such as functionality tests, parametric tests and burn-in tests.

Abstract: A system for testing semiconductor components contained on a substrate, such as a wafer, a panel, a leadframe or a module, includes an interconnect configured to electrically engage all of the components on the substrate at the same time. The interconnect includes a switching network configured to selectively apply test signals to selected components, to electrically isolate defective components and to transmit test signals from selected groups of components. The system also includes a test apparatus, such as a wafer prober or a carrier for handling the substrate. A method for testing includes the steps of providing the interconnect having the switching network, and controlling test signals to the components using the switching network to perform various test procedures, such as functionality tests, parametric tests and burn-in tests.

Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.

Abstract: A system for testing semiconductor components contained on a substrate, such as a wafer, a panel, a leadframe or a module, includes an interconnect configured to electrically engage all of the components on the substrate at the same time. The interconnect includes a switching network configured to selectively apply test signals to selected components, to electrically isolate defective components and to transmit test signals from selected groups of components. The system also includes a test apparatus, such as a wafer prober or a carrier for handling the substrate. A method for testing includes the steps of providing the interconnect having the switching network, and controlling test signals to the components using the switching network to perform various test procedures, such as functionality tests, parametric tests and burn-in tests.

Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.

Abstract: A bumped semiconductor component includes bumped contacts, a semiconductor die having die contacts, and a redistribution circuit having conductors for establishing electrical communication between the die contacts and the bumped contacts. The redistribution circuit also includes test contacts in electrical communication with the die contacts and with the bumped contacts. The test contacts allow the die to be tested without electrical engagement of the bumped contacts. The bumped semiconductor component can be contained on a wafer, or can be a singulated component such as a flip chip package. A test system includes the bumped semiconductor component, and an interconnect having contacts configured to electrically engage the test contacts without interference from the bumped contacts. If the test contacts are aligned with the die contacts, the same interconnect can be used to test the bare die as well as the bumped component.