Patents by Inventor Jorge Luis Lagos Benites

Jorge Luis Lagos Benites has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Device and method for enhancing voltage regulation performance
    Patent number: 11637554
    Abstract: A device for buffering a reference signal comprises a regulator circuit configured to generate at least two replicas of the reference signal as regulated output signals. The device further comprises a receiving circuit configured to receive the regulated output signals in a switchable manner. In this context, the regulated output signals are configured to have different performance characteristics.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: April 25, 2023
    Assignee: IMEC VZW
    Inventors: Nereo Markulic, Benjamin Hershberg, Jorge Luis Lagos Benites, Ewout Martens, Jan Craninckx
  • Apparatus and method for on-chip reconstruction of transient settling behavior
    Patent number: 11271580
    Abstract: An apparatus is provided for on-chip reconstruction of transient settling behavior. The apparatus comprises a first sampling circuit configured to sample a tracked analog signal output from a circuit under test over an operating period at a first sampling time, thereby generating a first sample output. In addition, the apparatus comprises a second sampling circuit configured to sample the tracked analog signal output at a second sampling time, thereby generating a second sample output. The apparatus further comprises a signal subtraction circuit configured to perform subtraction of the first sample output and the second sample output, thereby generating a difference signal. Moreover, the apparatus comprises a signal conversion circuit configured to output the difference signal in the digital domain.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: March 8, 2022
    Assignee: IMEC vzw
    Inventors: Benjamin Hershberg, Nereo Markulic, Jorge Luis Lagos Benites, Jan Craninckx
  • Apparatus and Method for On-Chip Reconstruction of Transient Settling Behavior
    Publication number: 20210194493
    Abstract: An apparatus is provided for on-chip reconstruction of transient settling behavior. The apparatus comprises a first sampling circuit configured to sample a tracked analog signal output from a circuit under test over an operating period at a first sampling time, thereby generating a first sample output. In addition, the apparatus comprises a second sampling circuit configured to sample the tracked analog signal output at a second sampling time, thereby generating a second sample output. The apparatus further comprises a signal subtraction circuit configured to perform subtraction of the first sample output and the second sample output, thereby generating a difference signal. Moreover, the apparatus comprises a signal conversion circuit configured to output the difference signal in the digital domain.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Inventors: Benjamin Hershberg, Nereo Markulic, Jorge Luis Lagos Benites, Jan Craninckx
  • Device and Method for Enhancing Voltage Regulation Performance
    Publication number: 20210181775
    Abstract: A device for buffering a reference signal comprises a regulator circuit configured to generate at least two replicas of the reference signal as regulated output signals. The device further comprises a receiving circuit configured to receive the regulated output signals in a switchable manner. In this context, the regulated output signals are configured to have different performance characteristics.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 17, 2021
    Inventors: Nereo Markulic, Benjamin Hershberg, Jorge Luis Lagos Benites, Ewout Martens, Jan Craninckx