Patents by Inventor Jorge Pablo Fernandez

Jorge Pablo Fernandez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11621266
    Abstract: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 4, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Priyadarshi Panda, Seshadri Ganguli, Sang Ho Yu, Sung-Kwan Kang, Gill Yong Lee, Sanjay Natarajan, Rajib Lochan Swain, Jorge Pablo Fernandez
  • Publication number: 20220214165
    Abstract: Disclosed herein are methods and systems for analyzing a cross-sectional feature of a structural element on a semiconductor wafer to determine whether an isolated or a systemic failure to reach preselected parameters occurred.
    Type: Application
    Filed: May 21, 2020
    Publication date: July 7, 2022
    Inventors: Manoj Kumar Dayyala, Jorge Pablo Fernandez, Kourosh Nafisi
  • Publication number: 20220068935
    Abstract: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
    Type: Application
    Filed: November 9, 2021
    Publication date: March 3, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Priyadarshi Panda, Seshadri Ganguli, Sang Ho Yu, Sung-Kwan Kang, Gill Yong Lee, Sanjay Natarajan, Rajib Lochan Swain, Jorge Pablo Fernandez
  • Patent number: 11171141
    Abstract: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: November 9, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Priyadarshi Panda, Seshadri Ganguli, Sang Ho Yu, Sung-Kwan Kang, Gill Yong Lee, Sanjay Natarajan, Rajib Lochan Swain, Jorge Pablo Fernandez
  • Publication number: 20200286897
    Abstract: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 10, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Priyadarshi Panda, Seshadri Ganguli, Sang Ho Yu, Sung-Kwan Kang, Gill Yong Lee, Sanjay Natarajan, Rajib Lochan Swain, Jorge Pablo Fernandez
  • Publication number: 20200135464
    Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method for processing a substrate includes: directing a stream of material from a PVD source toward a surface of a substrate at a non-perpendicular angle to the plane of the surface to selectively deposit the material on a top portion of one or more features on the substrate and form an overhang extending beyond a first sidewall of the one or more features; and etching a first layer of the substrate beneath the one or more features selective to the deposited material.
    Type: Application
    Filed: October 30, 2018
    Publication date: April 30, 2020
    Inventors: SREE RANGASAI V. KESAPRAGADA, JONATHAN R. BAKKE, JOUNG JOO LEE, BENCHERKI MEBARKI, CHRISTOPHER NGAI, REGINA FREED, GAURAV THAREJA, TEJINDER SINGH, JORGE PABLO FERNANDEZ
  • Patent number: 9926905
    Abstract: A system that converts acceleration to rotational energy by using gravity to lower a ballast member and buoyancy to raise it when the ballast member is filled with compressed air. The ballast's initial ascent is controlled by a brake member. This ascent causes a rack assembly to rise that actuates a compressor to refill the intermediary tank with compressed air so the cycle can repeat itself. The initial phase begins with the ballast member containing compressed air so it can ascend up a liquid-filled silo, generating rotational energy along the way using a mounted cable that travels around a wire drum. Upon reaching the top of the silo, valves will open allowing water to enter the ballast thereby sinking it to the bottom, creating additional rotational energy.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: March 27, 2018
    Inventor: Jorge Pablo Fernandez
  • Publication number: 20180051668
    Abstract: A system that converts acceleration to rotational energy by using gravity to lower a ballast member and buoyancy to raise it when the ballast member is filled with compressed air. The ballast's initial ascent is controlled by a brake member. This ascent causes a rack assembly to rise that actuates a compressor to refill the intermediary tank with compressed air so the cycle can repeat itself. The initial phase begins with the ballast member containing compressed air so it can ascend up a liquid-filled silo, generating rotational energy along the way using a mounted cable that travels around a wire drum. Upon reaching the top of the silo, valves will open allowing water to enter the ballast thereby sinking it to the bottom, creating additional rotational energy.
    Type: Application
    Filed: April 4, 2017
    Publication date: February 22, 2018
    Inventor: Jorge Pablo Fernandez
  • Patent number: 9663954
    Abstract: The present disclosure discloses an interlocking roof tile comprising two groove extending over length of the interlocking roof tile at both lateral ends that create side walls at the distalmost ends of the interlocking roof tile. The grooves are created on top surface of the interlocking roof tile using a press machine that uses pressure to mold the cement into the interlocking roof tiles. The interlocking roof tile's at bottom surface is flat. The interlocking roof tile further comprises at least one nail opening, provided spatially from each other to mount and secure the interlocking roof tile to the roof. In order to couple a plurality of interlocking roof tiles in series, a first interlocking roof tile is placed coupled to the second roof tile such that side wall of the first interlocking roof tile is engaged with the groove of the second interlocking roof tile.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 30, 2017
    Inventor: Jorge Pablo Fernandez