Patents by Inventor Jorge Vasquez

Jorge Vasquez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11925125
    Abstract: The disclosure provides a magnetic random access memory element. The magnetic random access memory element includes a magnetic reference layer, a magnetic free layer, and a non-magnetic barrier layer between the magnetic free layer and the magnetic reference layer. The magnetic random access memory element further includes a MgO layer contacting the magnetic free layer. The MgO layer includes multiple homogeneous layers of MgO that provide excellent interfacial perpendicular magnetic anisotropy to the magnetic free layer while also having a low RA.
    Type: Grant
    Filed: January 23, 2022
    Date of Patent: March 5, 2024
    Assignee: Integrated Silicon Solution, (Cayman) Inc.
    Inventors: Bartlomiej Adam Kardasz, Jorge Vasquez, Mustafa Pinarbasi, Georg Wolf
  • Patent number: 11545620
    Abstract: A Magnetic Tunnel Junction (MTJ) device can include a second Precessional Spin Current (PSC) magnetic layer of Ruthenium (Ru) having a predetermined thickness and a predetermined smoothness. An etching process for smoothing the PSC magnetic layer can be performed in-situ with various deposition processes after a high temperature annealing of the MTJ formation.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: January 3, 2023
    Assignee: Integrated Silicon Solution, (Cayman) Inc.
    Inventors: Bartlomiej Kardasz, Jorge Vasquez, Mustafa Pinarbasi
  • Patent number: 11484956
    Abstract: A carpenter's accordion is disclosed herein. The carpenter's accordion is a portable, compactable, and free-standing tool that may be advantageously used in combination with a table saw to increase the length of stock that one user can cut with a blade. Generally, the more sections that comprise the carpenter's accordion, the greater the lengths of stock one user will be able to cut using a table saw or other similar tool in combination with the accordion.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: November 1, 2022
    Inventor: Jorge Vasquez
  • Publication number: 20220246842
    Abstract: A method for manufacturing a magnetic memory array provides back end of line annealing for associated processing circuitry without causing thermal damage to magnetic memory elements of the magnetic memory array. An array of magnetic memory element pillars is formed on a wafer, and the magnetic memory elements are surrounded by a dielectric isolation material. After the pillars have been formed and surrounded by the dielectric isolation material an annealing process is performed to both anneal the memory element pillars to form a desired grain structure in the memory element pillars and also to perform back end of line thermal processing for circuitry associated with the memory element array.
    Type: Application
    Filed: April 15, 2022
    Publication date: August 4, 2022
    Inventors: Jorge Vasquez, Bartlomiej Adam Kardasz, Jacob Anthony Hernandez, Thomas D. Boone, Georg Wolf, Mustafa Pinarbasi
  • Publication number: 20220149267
    Abstract: The disclosure provides a magnetic random access memory element. The magnetic random access memory element includes a magnetic reference layer, a magnetic free layer, and a non-magnetic barrier layer between the magnetic free layer and the magnetic reference layer. The magnetic random access memory element further includes a MgO layer contacting the magnetic free layer. The MgO layer includes multiple homogeneous layers of MgO that provide excellent interfacial perpendicular magnetic anisotropy to the magnetic free layer while also having a low RA.
    Type: Application
    Filed: January 23, 2022
    Publication date: May 12, 2022
    Inventors: Bartlomiej Adam Kardasz, Jorge Vasquez, Mustafa Pinarbasi, Georg Wolf
  • Patent number: 11329217
    Abstract: A method for manufacturing a magnetic memory array provides back end of line annealing for associated processing circuitry without causing thermal damage to magnetic memory elements of the magnetic memory array. An array of magnetic memory element pillars is formed on a wafer, and the magnetic memory elements are surrounded by a dielectric isolation material. After the pillars have been formed and surrounded by the dielectric isolation material an annealing process is performed to both anneal the memory element pillars to form a desired grain structure in the memory element pillars and also to perform back end of line thermal processing for circuitry associated with the memory element array.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: May 10, 2022
    Assignee: Integrated Silicon Solution, (Cayman) Inc.
    Inventors: Jorge Vasquez, Bartlomiej Adam Kardasz, Jacob Anthony Hernandez, Thomas D. Boone, Georg Wolf, Mustafa Pinarbasi
  • Patent number: 11330008
    Abstract: Systems and methods are described to enable a DNS service to encode information into a network address to be advertised by the DNS service. Information encoded by a DNS service may include, for example, an identifier of a content set to which the network address corresponds (e.g., a domain name) and validity information, such as a digital signature, that verifies the validity of the network address. On receiving a request to communicate with the network address, a destination device associated with the network address may decode the encoded information within the network address to assist in processing the request. In some instances, the encoded information may be used to identify malicious network transmissions, such as transmissions forming part of a network attack, potentially without reliance on other data, such as separate mappings or contents of the data transmission.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: May 10, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Hardeep Singh Uppal, Jorge Vasquez, Craig Wesley Howard, Anton Stephen Radlein
  • Patent number: 11290418
    Abstract: A hybrid content request routing system is described herein. The hybrid content request routing system may use aspects of the anycast routing technique and aspects of the domain name server (DNS) resolver-based routing technique to identify the appropriate network address to provide to a user device in response to receiving a DNS query. For example, the hybrid content request routing system may include one or more points of presence (POPs), with some or all of the POPs forming one or more virtual POPs. Individual POPs may be assigned unique network addresses and POPs that form a virtual POP may be assigned the same anycast network address. The hybrid content request routing system can measure latencies from user devices to the individual POP network addresses and to the anycast network addresses and use the measured latencies to identify the network address that may result in the lowest latency.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: March 29, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Jorge Vasquez, Mohanish Narayan, Harvo Reyzell Jones
  • Patent number: 11283010
    Abstract: A magnetic memory element having a magnetic free layer and a magnetic reference layer with a non-magnetic barrier layer between the magnetic reference layer and the magnetic free layer. A spin current layer (which may be a precessional spin current layer) is located adjacent to the magnetic free layer and is separated from the magnetic free layer by a non-magnetic coupling layer. A material layer adjacent to and in contact with the spin current layer, has a material composition and thickness that are chosen to provide a desired effective magnetization in the spin current layer. The material layer, which may be a capping layer or a seed layer, can be constructed of a material other than tantalum which may include one or more of Zr, Mo, Ru, Rh, Pd, Hf, W, Ir, Pt and/or alloys and/or nitrides of these elements.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: March 22, 2022
    Assignee: Integrated Silicon Solution, (Cayman) Inc.
    Inventors: Jorge Vasquez, Bartlomiej Adam Kardasz, Cheng Wei Chiu, Mustafa Pinarbasi
  • Patent number: 11264557
    Abstract: A method for manufacturing a magnetic random access memory element having increased retention and low resistance area product (RA). A MgO layer is deposited to contact a magnetic free layer of the memory element. The MgO layer is deposited in a sputter deposition chamber using a DC power and a Mg target to deposit Mg. The deposition of Mg is periodically stopped and oxygen introduced into the deposition chamber. This process is repeated a desired number of times, resulting in a multi-layer structure. The resulting MgO layer provides excellent interfacial perpendicular magnetic anisotropy to the magnetic free layer while also having a low RA.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: March 1, 2022
    Assignee: Integrated Silicon Solution, (Cayman) Inc.
    Inventors: Bartlomiej Adam Kardasz, Jorge Vasquez, Mustafa Pinarbasi, Georg Wolf
  • Patent number: 11162981
    Abstract: A magnetic field transducer mounting apparatus can include a first mount configured to fixedly couple to a side surface of a wafer test fixture magnet, and a second and third mount configured to adjustably position a magnetic field transducer in a predetermined location proximate a face of the wafer test fixture magnet.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: November 2, 2021
    Assignee: Integrated Silicon Solution, (Cayman) Inc.
    Inventors: Danny Yam, Jorge Vasquez, Georg Wolf, Roberto Cordero
  • Patent number: 10962590
    Abstract: A magnet mounting apparatus including a cage, a magnet carriage and first actuator for use in testing Magnetic Tunnel Junction (MTJ) devices. The cage can be configured for mounting to an Automated Test Equipment (ATE). The magnet carriage can be configured for coupling to a wafer test magnet. The first actuator can be coupled between the cage and the magnet carriage. The first actuator can be configured to move the magnet carriage between a first position and a second position along a z-axis. The first position can be configured for locating the wafer test magnet within a predetermined proximity to a Device Under Test (DUT) wafer, and the second position can be configured for replacing a probe card.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: March 30, 2021
    Assignee: Spin Memory, Inc.
    Inventors: Danny Yam, Jorge Vasquez, Roberto Cordero, Georg Wolf
  • Patent number: 10916696
    Abstract: A method for manufacturing a magnetic memory element structure using a Ru hard mask and a post pillar thermal annealing process. A Ru hard mask is formed over a plurality of memory element layers and an ion milling is performed to transfer the image of the Ru hard mask onto the underlying memory element layers. A high-angle ion milling an be performed to remove any redeposited material from the sides of the memory element layers, and a non-magnetic, dielectric material can be deposited. A thermal annealing process can then be performed to repair any damage caused by the previously performed ion milling processes.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: February 9, 2021
    Assignee: SPIN MEMORY, INC.
    Inventors: Mustafa Pinarbasi, Pradeep Manandhar, Jorge Vasquez, Bartlomiej Adam Kardasz, Thomas D. Boone
  • Publication number: 20200411752
    Abstract: A Magnetic Tunnel Junction (MTJ) device can include a second Precessional Spin Current (PSC) magnetic layer of Ruthenium (Re) having a predetermined thickness and a predetermined smoothness. An etching process for smoothing the PSC magnetic layer can be performed in-situ with various deposition processes after a high temperature annealing of the MTJ formation.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 31, 2020
    Inventors: Bartlomiej KARDASZ, Jorge VASQUEZ, Mustafa PINARBASI
  • Patent number: 10879457
    Abstract: Semiconductor substrate adaptor configured to adapt a substrate of a first dimension to a second dimension, such that the substrate can be properly supported by a supporting mechanism (e.g., a wafer cassette) customized for substrates of the second dimension. The substrate adaptor may be made of quartz. The combination of the substrate adaptor and a substrate fitting therein causes no perturbation in various aspects of a semiconductor process. Therefore, the substrate adaptor conveniently enables a substrate of the first dimension to be processed in the same processing equipment and conditions as a substrate of the second dimension. A vertical substrate adaptor may have a semicircular body with a semicircular cutout for accommodating a wafer and can support a wafer vertically. A horizontal substrate adaptor may have a circular body with a circular cutout for accommodating an entire wafer and supporting the wafer horizontally.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: December 29, 2020
    Assignee: Spin Memory, Inc.
    Inventors: Jorge Vasquez, Danny Yam
  • Patent number: 10879454
    Abstract: A magnetic memory element for using in magnetic random access memory. The magnetic memory element includes a novel exchange coupling layer for use in an antiferromagnetic structure for magnetically pinning a magnetic reference layer of the memory element. The exchange coupling layer is located between a first magnetic layer (reference layer) and a second magnetic layer (keeper layer). The exchange coupling layer includes a layer of Ru located between first and second layers of Ir. The Ir layers can be in contact with each of the first and second magnetic layers to provide an interfacial magnetic anisotropy, as well as providing RKKY exchange field. The Ru layer, provides an increased RKKY exchange field as a result of the high RKKY exchange coupling of Ru.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 29, 2020
    Assignee: SPIN MEMORY, INC.
    Inventors: Bartlomiej Adam Kardasz, Cheng Wei Chiu, Jorge Vasquez, Mustafa Pinarbasi
  • Publication number: 20200366638
    Abstract: A hybrid content request routing system is described herein. The hybrid content request routing system may use aspects of the anycast routing technique and aspects of the domain name server (DNS) resolver-based routing technique to identify the appropriate network address to provide to a user device in response to receiving a DNS query. For example, the hybrid content request routing system may include one or more points of presence (POPs), with some or all of the POPs forming one or more virtual POPs. Individual POPs may be assigned unique network addresses and POPs that form a virtual POP may be assigned the same anycast network address. The hybrid content request routing system can measure latencies from user devices to the individual POP network addresses and to the anycast network addresses and use the measured latencies to identify the network address that may result in the lowest latency.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 19, 2020
    Inventors: Jorge Vasquez, Mohanish Narayan, Harvo Reyzell Jones
  • Patent number: 10840436
    Abstract: A Magnetic Tunnel Junction (MTJ) device can include a free magnetic layer having a predetermined smoothness. An etching process for smoothing the free magnetic layer can be performed in-situ with various deposition processes after a high temperature annealing of the MTJ formation.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: November 17, 2020
    Assignee: Spin Memory, Inc.
    Inventors: Bartlomiej Kardasz, Jorge Vasquez, Mustafa Pinarbasi
  • Publication number: 20200350493
    Abstract: A method for manufacturing a magnetic memory element structure using a Ru hard mask and a post pillar thermal annealing process. A Ru hard mask is formed over a plurality of memory element layers and an ion milling is performed to transfer the image of the Ru hard mask onto the underlying memory element layers. A high-angle ion milling an be performed to remove any redeposited material from the sides of the memory element layers, and a non-magnetic, dielectric material can be deposited. A thermal annealing process can then be performed to repair any damage caused by the previously performed ion milling processes.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 5, 2020
    Inventors: Mustafa Pinarbasi, Pradeep Manandhar, Jorge Vasquez, Bartlomiej Adam Kardasz, Thomas D. Boone
  • Patent number: D900804
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: November 3, 2020
    Assignee: SMARTMATIC INTERNATIONAL CORPORATION
    Inventors: Antonio Mugica, Roger Pinate, Eduardo Correia, Fernando Hernandez, Jorge Vasquez, Ernesto Vecchi, Romano Stasi, German Dorta