Patents by Inventor Joris P.V. Maas

Joris P.V. Maas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8766244
    Abstract: Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: July 1, 2014
    Assignee: Creator Technology B.V.
    Inventors: Nick A. J. M. van Aerle, Erik van Veenendaal, Pieter van Lieshout, Christoph Wilhelm Sele, Joris P. V. Maas
  • Publication number: 20140027717
    Abstract: Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 30, 2014
    Applicant: Polymer Vision B.V.
    Inventors: Nick A.J.M. van Aerle, Erik Van Veenendaal, Pieter Van Lieshout, Christoph Wilhelm Sele, Joris P.V. Maas
  • Publication number: 20140014942
    Abstract: A bottom gate bottom contact thin-film transistor including a gate electrode, a source electrode, a drain electrode, a dielectric layer and a semiconductor layer of a semiconducting oxide is disclosed. The dielectric layer is arranged between the gate electrode and the semiconductor layer structure, and the source electrode and the drain electrode are covered with said semiconductor layer structure. The source electrode and the drain electrode include at least a first electrode portion of an oxygen reducing material, and a second electrode portion of an additional material different from said oxygen reducing material wherein the second electrode portion of the drain at a side facing the source exposes to said semiconductor layer structure at least a surface portion of a main surface of its first electrode portion facing away from the dielectric layer.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 16, 2014
    Applicant: POLYMER VISION B.V.
    Inventor: Joris P.V. Maas