Patents by Inventor Joris Van Campenhout
Joris Van Campenhout has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190101711Abstract: Example embodiments relate to active-passive waveguide photonic systems. An example embodiment includes a monolithic integrated active/passive waveguide photonic system. The system includes a substrate having positioned thereon at least one active waveguide and at least one passive waveguide. The at least one active waveguide and the at least one passive waveguide are monolithically integrated and are arranged for evanescent wave coupling between the waveguides. The at least one active waveguide and the at least one passive waveguide are positioned so that at least a portion of each waveguide does not overlap the other waveguide, both in a height direction and in a lateral direction with respect to the substrate.Type: ApplicationFiled: October 3, 2018Publication date: April 4, 2019Applicants: IMEC VZW, Universiteit GentInventors: Joris Van Campenhout, Bernardette Kunert, Maria Ioanna Pantouvaki, Dries Van Thourhout, Shi Yuting
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Publication number: 20180183212Abstract: An electrically-operated semiconductor laser device and method for forming the laser device are provided. The laser device includes a fin structure to which a waveguide is optically coupled. The waveguide is optically coupled to passive waveguides at either end thereof. The fin structure includes an array of fin elements, each fin element comprising Group III-V materials.Type: ApplicationFiled: December 13, 2017Publication date: June 28, 2018Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D, Universiteit GentInventors: Joris Van Campenhout, Clement Merckling, Maria Ioanna Pantouvaki, Ashwyn Srinivasan, Irina Kulkova
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Patent number: 9482816Abstract: Semiconductor photonics devices for coupling radiation to a semiconductor waveguide are described. An example photonics device comprises a semiconductor-on-insulator substrate comprising a semiconductor substrate, a buried oxide layer positioned on top of the semiconductor substrate, and the semiconductor waveguide on top of the buried oxide layer to which radiation is to be coupled. The example device also comprises a grating coupler positioned on top of the buried oxide layer and configured for coupling incident radiation to the semiconductor waveguide. The semiconductor substrate has a recessed portion at the backside of the semiconductor substrate for receiving incident radiation to be coupled to the semiconductor waveguide via the backside of the semiconductor substrate and the grating coupler.Type: GrantFiled: December 4, 2014Date of Patent: November 1, 2016Assignee: IMEC VZWInventors: Joris Van Campenhout, Philippe Absil, Peter Verheyen
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Patent number: 9472705Abstract: An integrated avalanche photodetector and a method for fabrication thereof. The integrated avalanche photodetector comprises a Ge body adapted to conduct an optical mode. The Ge body comprises a first p-doped region that extends from a first main surface to a second main surface of the Ge body. The Ge body further comprises a first n-doped region that extends from the first main surface towards the second main surface of the Ge body. An intrinsic region occupies the undoped part of the Ge body. A first avalanche junction is formed by the first n-doped region that is located aside the p-doped region. The Ge body further comprises an incidence surface, suitable for receiving an optical mode, and a second n-doped Ge region that covers the Ge body and forms a second avalanche junction with the first p-doped region at the first main surface.Type: GrantFiled: December 23, 2015Date of Patent: October 18, 2016Assignees: IMEC VZW, Universiteit GentInventors: Hongtao Chen, Joris Van Campenhout, Gunther Roelkens
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Patent number: 9413139Abstract: The present disclosure relates to a method for integrating a sub-micron III-V waveguide laser on a semiconductor photonics platform as well as to a corresponding device/system. The method comprises providing on a semiconductor substrate an electrically insulating layer, etching a trench having a width in the range between 50 nm and 800 nm through the electrically insulating layer, thereby locally exposing the silicon substrate, providing a III-V layer stack in the trench by local epitaxial growth to form a channel waveguide, and providing a light confinement element for confining radiation in the local-epitaxial-grown channel waveguide.Type: GrantFiled: July 1, 2014Date of Patent: August 9, 2016Assignees: IMEC VZW, Universiteit GentInventors: Dries Van Thourhout, Zhechao Wang, Joris Van Campenhout, Maria Ioanna Pantouvaki
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Publication number: 20160204298Abstract: An integrated avalanche photodetector and a method for fabrication thereof. The integrated avalanche photodetector comprises a Ge body adapted to conduct an optical mode. The Ge body comprises a first p-doped region that extends from a first main surface to a second main surface of the Ge body. The Ge body further comprises a first n-doped region that extends from the first main surface towards the second main surface of the Ge body. An intrinsic region occupies the undoped part of the Ge body. A first avalanche junction is formed by the first n-doped region that is located aside the p-doped region. The Ge body further comprises an incidence surface, suitable for receiving an optical mode, and a second n-doped Ge region that covers the Ge body and forms a second avalanche junction with the first p-doped region at the first main surface.Type: ApplicationFiled: December 23, 2015Publication date: July 14, 2016Applicants: IMEC VZW, Universiteit GentInventors: Hongtao Chen, Joris Van Campenhout, Gunther Roelkens
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Publication number: 20150333481Abstract: The present disclosure relates to a method for integrating a sub-micron III-V waveguide laser on a semiconductor photonics platform as well as to a corresponding device/system. The method comprises providing on a semiconductor substrate an electrically insulating layer, etching a trench having a width in the range between 50 nm and 800 nm through the electrically insulating layer, thereby locally exposing the silicon substrate, providing a III-V layer stack in the trench by local epitaxial growth to form a channel waveguide, and providing a light confinement element for confining radiation in the local-epitaxial-grown channel waveguide.Type: ApplicationFiled: July 1, 2014Publication date: November 19, 2015Applicants: UNIVERSITEIT GENT, IMEC VZWInventors: Dries Van Thourhout, Zhechao Wang, Joris Van Campenhout, Maria Ioanna Pantouvaki
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Patent number: 9159860Abstract: An avalanche photodetector element is disclosed for converting an optical signal to an electrical signal, comprising an input waveguide and a photodetector region, the photodetector region comprising at least one intrinsic region, at least one p-doped region and at least one n-doped region, the doped regions and the at least one intrinsic region forming at least one PIN-junction avalanche photodiode, the input waveguide and the photodetector region being arranged with respect to each other such that the optical signal conducted by the input waveguide is substantially conducted into the photodetector region to the PIN-junction avalanche photodiode, the PIN-junction avalanche photodiode converting the optical signal to an electrical signal, characterized in that the photodetector region comprises more than one p-doped region and/or n-doped region, whereby these p-doped regions and/or n-doped regions are physically arranged as an array.Type: GrantFiled: November 22, 2013Date of Patent: October 13, 2015Assignee: IMECInventors: Geert Hellings, Joris Van Campenhout, Peter Verheyen
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Publication number: 20150177459Abstract: Semiconductor photonics devices for coupling radiation to a semiconductor waveguide are described. An example photonics device comprises a semiconductor-on-insulator substrate comprising a semiconductor substrate, a buried oxide layer positioned on top of the semiconductor substrate, and the semiconductor waveguide on top of the buried oxide layer to which radiation is to be coupled. The example device also comprises a grating coupler positioned on top of the buried oxide layer and configured for coupling incident radiation to the semiconductor waveguide. The semiconductor substrate has a recessed portion at the backside of the semiconductor substrate for receiving incident radiation to be coupled to the semiconductor waveguide via the backside of the semiconductor substrate and the grating coupler.Type: ApplicationFiled: December 4, 2014Publication date: June 25, 2015Applicant: IMEC VZWInventors: Joris Van Campenhout, Philippe Absil, Peter Verheyen
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Patent number: 8912032Abstract: Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.Type: GrantFiled: January 23, 2013Date of Patent: December 16, 2014Assignee: International Business Machines CorporationInventors: Solomon Assefa, William M. Green, Young-hee Kim, Joris Van Campenhout, Yurii A. Vlasov
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Patent number: 8741684Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.Type: GrantFiled: May 8, 2012Date of Patent: June 3, 2014Assignees: IMEC, Universiteit GentInventors: Wim Bogaerts, Joris Van Campenhout, Peter Verheyen, Philippe Absil
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Publication number: 20140138787Abstract: An avalanche photodetector element is disclosed for converting an optical signal to an electrical signal, comprising an input waveguide and a photodetector region, the photodetector region comprising at least one intrinsic region, at least one p-doped region and at least one n-doped region, the doped regions and the at least one intrinsic region forming at least one PIN-junction avalanche photodiode, the input waveguide and the photodetector region being arranged with respect to each other such that the optical signal conducted by the input waveguide is substantially conducted into the photodetector region to the PIN-junction avalanche photodiode, the PIN-junction avalanche photodiode converting the optical signal to an electrical signal, characterized in that the photodetector region comprises more than one p-doped region and/or n-doped region, whereby these p-doped regions and/or n-doped regions are physically arranged as an array.Type: ApplicationFiled: November 22, 2013Publication date: May 22, 2014Applicant: IMECInventors: Geert Hellings, Joris Van Campenhout, Peter Verheyen
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Patent number: 8363686Abstract: Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.Type: GrantFiled: February 1, 2012Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Solomon Assefa, William M. Green, Younghee Kim, Joris Van Campenhout, Yurii Vlasov
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Publication number: 20120288971Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.Type: ApplicationFiled: May 8, 2012Publication date: November 15, 2012Applicants: Universiteit Gent, IMECInventors: Wim Bogaerts, Joris Van Campenhout, Peter Verheyen, Philippe Absil
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Publication number: 20120125916Abstract: Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.Type: ApplicationFiled: February 1, 2012Publication date: May 24, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Solomon Assefa, William M. Green, Young-hee Kim, Joris Van Campenhout, Yurii A. Vlasov
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Patent number: 8178382Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.Type: GrantFiled: January 13, 2011Date of Patent: May 15, 2012Assignee: International Business Machines CorporationInventors: Solomon Assefa, Jack O. Chu, Martin M. Frank, William M. Green, Young-hee Kim, George G. Totir, Joris Van Campenhout, Yurri A. Vlasov, Ying Zhang
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Patent number: 8111724Abstract: Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.Type: GrantFiled: July 7, 2009Date of Patent: February 7, 2012Assignee: International Business Machines CorporationInventors: Solomon Assefa, William M. Green, Younghee Kim, Joris Van Campenhout, Yurii Vlasov
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Publication number: 20110143482Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.Type: ApplicationFiled: January 13, 2011Publication date: June 16, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Solomon Assefa, Jack O. Chu, Martin M. Frank, William M. Green, Young-hee Kim, George G. Totir, Joris Van Campenhout, Yurri A. Vlasov, Ying Zhang
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Patent number: 7902620Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.Type: GrantFiled: August 14, 2008Date of Patent: March 8, 2011Assignee: International Business Machines CorporationInventors: Solomon Assefa, Jack O. Chu, Martin M. Frank, William M. Green, Young-hee Kim, George G. Totir, Joris Van Campenhout, Yurii A. Vlasov, Ying Zhang
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Publication number: 20110007761Abstract: Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.Type: ApplicationFiled: July 7, 2009Publication date: January 13, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Solomon Assefa, William M. Green, Young-hee Kim, Joris Van Campenhout, Yurii A. Vlasov