Patents by Inventor Jose A. Camarena

Jose A. Camarena has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9909934
    Abstract: A determination is made if a temperature of a system has exceeded a hot threshold or a cold threshold. At room temperature, a first adjustment is determined for first nominal settings. The first nominal settings are for a first input to a first comparator. At room temperature, a second adjustment is determined for second nominal settings. The second nominal settings are for a first input to a second comparator. The temperature is monitored, during normal operation of the system, using a temperature dependent voltage with the first comparator adjusted with the first adjustment and second comparator adjusted with the second adjustment.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Jose A. Camarena, Khoi B. Mai, Dale J. McQuirk
  • Patent number: 9703303
    Abstract: A voltage regulation system includes a voltage regulator configured to output a control signal indicating whether a voltage based on output of the voltage regulator is lower than a specified value. A charge pump is configured to output a voltage and a charging current. A pump monitor is configured to receive the control signal and the output voltage of the charge pump, and activate the charge pump when the control signal indicates the voltage based on output of the voltage regulator is lower than a specified value and the output voltage of the charge pump is lower than a threshold value.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: July 11, 2017
    Assignee: NXP USA, Inc.
    Inventors: Miten H. Nagda, Jose A. Camarena, Dale J. McQuirk
  • Publication number: 20150309518
    Abstract: A voltage regulation system includes a voltage regulator configured to output a control signal indicating whether a voltage based on output of the voltage regulator is lower than a specified value. A charge pump is configured to output a voltage and a charging current. A pump monitor is configured to receive the control signal and the output voltage of the charge pump, and activate the charge pump when the control signal indicates the voltage based on output of the voltage regulator is lower than a specified value and the output voltage of the charge pump is lower than a threshold value.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 29, 2015
    Inventors: MITEN H. NAGDA, JOSE A. CAMARENA, DALE J. MCQUIRK
  • Publication number: 20150247764
    Abstract: A determination is made if a temperature of a system has exceeded a hot threshold or a cold threshold. At room temperature, a first adjustment is determined for first nominal settings. The first nominal settings are for a first input to a first comparator. At room temperature, a second adjustment is determined for second nominal settings. The second nominal settings are for a first input to a second comparator. The temperature is monitored, during normal operation of the system, using a temperature dependent voltage with the first comparator adjusted with the first adjustment and second comparator adjusted with the second adjustment.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 3, 2015
    Inventors: JOSE A. CAMARENA, Khoi B. Mai, Dale J. McQuirk
  • Patent number: 8638135
    Abstract: An integrated circuit includes first and second transistors, a switch, and a power-on reset (POR) circuit. The first transistor has a first current electrode, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode. The switch is for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal. The POR circuit has a latch-up detection circuit coupled to receive the power supply voltage and to a control terminal of the switch. The latch-up detection circuit is for detecting a low voltage condition of the power supply voltage, and in response, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: January 28, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jose A. Camarena, Dale J. McQuirk, Miten H. Nagda
  • Publication number: 20130093486
    Abstract: An integrated circuit includes first and second transistors, a switch, and a power-on reset (POR) circuit. The first transistor has a first current electrode, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode. The switch is for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal. The POR circuit has a latch-up detection circuit coupled to receive the power supply voltage and to a control terminal of the switch. The latch-up detection circuit is for detecting a low voltage condition of the power supply voltage, and in response, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.
    Type: Application
    Filed: October 13, 2011
    Publication date: April 18, 2013
    Inventors: JOSE A. CAMARENA, DALE J. MCQUIRK, MITEN H. NAGDA
  • Patent number: 8228109
    Abstract: A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: July 24, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael A. Stockinger, Jose A. Camarena, Wenzhong Zhang
  • Publication number: 20110316610
    Abstract: A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Inventors: Michael A. Stockinger, Jose A. Camarena, Wenzhong Zhang
  • Publication number: 20060284714
    Abstract: An electrical energy saving device or a magnetic induction device is adapted to surround a power delivery line. The magnetic induction device applies a magnetic field region to the power delivery line to reduce amperage up to about 25%. The magnetic induction device can be a one-piece or two-piece construction formed from a molded mixture. The mixture can include from about 35 wt % to about 45 wt % of an epoxy resin; from about 30 wt % to about 40 wt % of a polymer; from about 1 wt % to about 4 wt % of dimethyl sulfoxide; from about 4 wt % to about 7 wt % of a transition metal; from about 10 wt % to about 20 wt % of a magnetic material; and from about 1 wt % to about 5 wt % of a catalyst.
    Type: Application
    Filed: July 12, 2005
    Publication date: December 21, 2006
    Inventor: Jose Camarena Villasenor
  • Publication number: 20060283006
    Abstract: Method for manufacturing magnetic induction devices to control electricity entail mixing a resin with a polymer forming a mixture; adding a transition metal to the mixture forming a metalized mixture; adding dimethyl sulfoxide to the metalized mixture; mixture forming a liquid metalized mixture; adding a magnetic powder to the liquid metalized mixture forming a magnetized mixture; and adding a catalyst to the magnetized mixture forming a hot mixture due to an exothermic reaction. The hot liquid is poured into two or more molds. A gap or channel is formed in each section. The sections are allowed to cool, removed from the molds, and fastened together such that the channel runs the length of the device. A one-piece magnetic induction device can also be formed using these methods. The formed magnetic induction device applies a magnetic field region to a power delivery line to reduce amperage up to about 25%.
    Type: Application
    Filed: July 12, 2005
    Publication date: December 21, 2006
    Inventor: Jose Camarena Villasenor
  • Publication number: 20060284715
    Abstract: An electrical energy saving device or a magnetic induction device is adapted to surround a power delivery line. The magnetic induction device applies a magnetic field region to the power delivery line to reduce amperage up to about 25%. The magnetic induction device can be a one-piece or two-piece construction formed from a molded mixture. The mixture can include from about 35 wt % to about 45 wt % of an epoxy resin; from about 30 wt % to about 40 wt % of a polymer; from about 1 wt % to about 4 wt % of dimethyl sulfoxide; from about 4 wt % to about 7 wt % of a transition metal; from about 10 wt % to about 20 wt % of a magnetic material; and from about 1 wt % to about 5 wt % of a catalyst.
    Type: Application
    Filed: July 12, 2005
    Publication date: December 21, 2006
    Inventor: Jose Camarena Villasenor
  • Patent number: 6327126
    Abstract: A circuit (600) provides Electrostatic Discharge (ESD) protection for internal elements in an integrated circuit during an ESD event. The circuit (600) includes cascoded NMOSFETs (614, 616), with the upper NMOSFET (614) connected to voltage divider circuitry (628). The voltage divider circuitry (628) provides a first bias voltage to the gate of the upper NMOSFET (614) during an ESD event and a second bias voltage during normal operation. Preferably, the first bias voltage is approximately ½ of the drain voltage of the upper NMOSFET (614). Under these bias conditions the cascoded NMOSFETs exhibit a maximum voltage threshold for initiation of parasitic lateral bipolar conduction.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: December 4, 2001
    Assignee: Motorola, Inc.
    Inventors: James W. Miller, Michael G. Khazhinsky, Geoffrey B. Hall, Jose A. Camarena, Joseph Chan, Fujio Takeda