Patents by Inventor Jose A. Salcedo

Jose A. Salcedo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10478355
    Abstract: The invention relates to an absorbent core intended for use in a disposable absorbent article, said core comprising an upper surface and a lower surface, a front portion and a rear portion, two longitudinal edges and two transverse edges, and being formed of three layers: an upper layer, an intermediate layer and a lower layer. The upper and lower layers contain less than 25% superabsorbent material. The intermediate layer has three zones with different specific weights: one receiving and distribution zone, one or more transition zones and one or more anti-leakage zones.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: November 19, 2019
    Assignee: GRUPE P.I. MABE, S.A. DE C.V.
    Inventors: Andrés Zamudio Ahumada, Mauricio Vázquez Arana, José Salcedo Agüallo
  • Patent number: 9916575
    Abstract: A method for wireless communication is described. The method includes using a routing table for multiple secure elements. The routing table assigns a preferred secure element for a transaction type. The method also includes selecting a first secure element for a transaction based on the routing table. The method further includes updating the routing table based on a received command to use a second secure element to complete the transaction.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: March 13, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Alberto Jose Salcedo, Ashish Banthia, Jeremy O'Donoghue
  • Publication number: 20160310331
    Abstract: An absorbent core for implementation in a newborn baby diaper that has a front section, a back section and a crotch section so that the crotch section has a maximum width of 5 cm to allow the baby's legs to form an angle “?” at a maximum of 30° with respect to the vertical axis; in addition, said core comprises a base weight between 700 and 900 g/m2; a density that varies in a range between 0.16 and 0.24 g/cm3 and a ratio of absorbent to superabsorbent material from 50/50 to 70/30.
    Type: Application
    Filed: December 17, 2014
    Publication date: October 27, 2016
    Inventors: José Salcedo Aguallo, Carlos Canales Espinosa de Los Monteros, Lucía del Carmen Sánchez Fernández, Olimpia Martinez Zamora
  • Publication number: 20160140537
    Abstract: A method for wireless communication is described. The method includes using a routing table for multiple secure elements. The routing table assigns a preferred secure element for a transaction type. The method also includes selecting a first secure element for a transaction based on the routing table. The method further includes updating the routing table based on a received command to use a second secure element to complete the transaction.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 19, 2016
    Inventors: Alberto Jose Salcedo, Ashish Banthia, Jeremy O'Donoghue
  • Publication number: 20160120711
    Abstract: The invention relates to an absorbent core intended for use in a disposable absorbent article, said core comprising an upper surface and a lower surface, a front portion and a rear portion, two longitudinal edges and two transverse edges, and being formed of three layers: an upper layer, an intermediate layer and a lower layer. The upper and lower layers contain less than 25% superabsorbent material. The intermediate layer has three zones with different specific weights: one receiving and distribution zone, one or more transition zones and one or more anti-leakage zones.
    Type: Application
    Filed: May 24, 2013
    Publication date: May 5, 2016
    Inventors: Andrés Zamudio Ahumada, Mauricio Vázquez Arana, José Salcedo Agüallo
  • Patent number: 6774942
    Abstract: An improved offset correction circuit for an image digitizing system having a correlated double sample and hold circuit, a programmable gain amplifier and an analog-to-digital converter. The output of the analog-to-digital converter is provided to a dual offset correction circuit. The dual offset correction circuit provides both first and second correction values as feedback signals. In one embodiment, the first correction value is a coarse correction which is applied prior to amplification by the programmable gain amplifier. The second correction value is a fine correction offset which is applied as feedback after the programmable gain amplifier.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: August 10, 2004
    Assignee: Exar Corporation
    Inventors: Jose A. Salcedo, Srinivas N. Neti, Charles A. Rogers
  • Patent number: 6340944
    Abstract: An analog-to-digital converter which has a low resolution and high resolution mode. In response to the low resolution mode signal, a switching circuit selects only certain of the digital bit outputs. In one embodiment, the analog-to-digital converter is a pipelined circuit with a number of stages. In response to the low resolution mode, a number of the stages are bypassed, so that only the needed stages for the smaller number of bits are used. The stages that are bypassed are preferably powered down, but not completely. By maintaining a small amount of bias current to the bypassed stages, they can quickly respond when a switch is made back to full resolution mode.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: January 22, 2002
    Assignee: Exar Corporation
    Inventors: Ronald Chang, Jose A. Salcedo, Raphael Horton
  • Patent number: 5587684
    Abstract: A method of including power control features to analog integrated circuits does not require the addition of separate power control input signal pin(s). One or more existing externally applied reference signals are sensed to determine if the signals are within specified operational limits. When the reference signals are outside of the operational limits the internal circuit blocks are switched off to their non-power dissipating state. When the reference signals are within the operational limits the internal circuit blocks are switched on to their normal operating state. This switching can be accomplished in various ways, including but not limited to a single switch in a series with the power supply or many distributed switches in each circuit block or stage.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: December 24, 1996
    Assignee: Exar Corporation
    Inventor: Jose A. Salcedo