Abstract: An example microelectronics device package includes: a device mounting layer on an uppermost trace conductor layer on a device side surface of a package substrate, the uppermost trace conductor layer having a first pattern density. The device mounting layer includes a device connection conductor layer; a device mounting land conductor layer on the device connection conductor layer, the device mounting land conductor layer having device mounting land conductors directly contacting the conductors of the device connection conductor layer and having a second pattern density that is less than the first pattern density. A semiconductor die is flip chip mounted to the device mounting layer by solder joints between post connects extending from the semiconductor die and the device mounting land conductors. Mold compound covers the semiconductor die, and the device mounting layer, the mold compound is spaced from the uppermost trace conductor layer by the device mounting layer.

Abstract: A semiconductor device assembly includes a package substrate having a top side including a plurality of bondable features, at least one integrated circuit (IC) die including a substrate having at least a semiconductor surface including circuitry configured for realizing at least one function including nodes coupled to bond pads with metal posts on the bond pads. The metal posts are attached by a solder joint to the bondable features. The solder joint has a void density of less than or equal to (?) 5% of a cross-sectional area of the solder joint.

Abstract: A lead frame that is partially covered with an adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame and using a photo-imageable polyimide or epoxy material to form the adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame blank and using a photo-imageable polyimide or epoxy material to form the adhesion layer.

Abstract: An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.

Abstract: An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.

Abstract: An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.

Abstract: A lead frame that is partially covered with an adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame and using a photo-imageable polyimide or epoxy material to form the adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame blank and using a photo-imageable polyimide or epoxy material to form the adhesion layer.

Abstract: A lead frame that is partially covered with an adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame and using a photo-imageable polyimide or epoxy material to form the adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame blank and using a photo-imageable polyimide or epoxy material to form the adhesion layer.

Abstract: A lead frame that is partially covered with an adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame and using a photo-imageable polyimide or epoxy material to form the adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame blank and using a photo-imageable polyimide or epoxy material to form the adhesion layer.

Abstract: An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.

Abstract: An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.

Abstract: An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.