Abstract: The present invention relates to a photonic chip carried out by the combination and interconnection of equally-oriented Programmable Photonics Processing Blocks, with all their longitudinal axes in parallel, implemented over a photonic chip that is capable of implementing one or multiple, simultaneous photonics circuits with optical feedback paths and/or linear multiport transformations, by the appropriate programming of its resources and the selection of its input and output ports. The invention also relates to a parallel field-programmable photonic array (P-FPPA) comprising of, at least one programmable circuit based on equally-oriented/parallel tunable beam-splitters with independent coupling and phase-shifting configuration and peripheral high-performance building blocks.