Patents by Inventor Jose Harrison

Jose Harrison has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8723531
    Abstract: An integrated RF circuit has an RF input port and an RF output port coupled to an external circuit element having known impedance such as an antenna. An RF circuit element is disposed between the RF input port and the RF output port and has a first input port and a first output port. The RF circuit element affects a signal received at the first input port and provides the affected signal to the first output port. The integrated RF circuit also has a VSWR detector circuit that measures a ratio of a characteristic of RF signals at the first input port and the first output port and that provides an indication of the ratio at a VSWR output port. The measured ratio of the characteristic is affected by an impedance of the coupling thereby providing an indication relating to the coupling.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: May 13, 2014
    Assignee: SiGe Semiconductor, Inc.
    Inventor: Jose Harrison
  • Publication number: 20100231236
    Abstract: An integrated RF circuit is disclosed having an RF input port and an RF output port. The RF output port is for being coupled with a known impedance to an external circuit element such as an antenna. At least an RF circuit element is disposed along a propagation path between the RF input port and the RF output port. The RF circuit element has a first input port and a first output port and is for affecting a signal received at the first input port and providing the affected signal to the first output port. The integrated RF circuit also has a VSWR detector circuit for measuring a ratio of a characteristic of RF signals at the first input port and a same characteristic of the RF signals at the first output port and for providing an indication of the ratio at a VSWR output port. The measured ratio of the characteristic is affected by an impedance of the coupling thereby providing an indication relating to the coupling.
    Type: Application
    Filed: March 1, 2010
    Publication date: September 16, 2010
    Applicant: SiGe Semiconductor Inc.
    Inventor: Jose Harrison
  • Patent number: 7445968
    Abstract: In order to achieve electromagnetic and/or thermal isolation between components in close proximity to each other on a common module substrate, an alternate package and method for manufacturing the package is provided. Inventive methods utilize a grounded, metal-coated overmold for a IC module package that can provide an alternate thermal path to heat sink high power components generating excess heat energy and/or provide general electromagnetic shielding and isolation between two integrated circuits in very close proximity that are susceptible to electromagnetic interference. A dielectric layer conformably covers semiconductor dies mounted on a substrate. On some semiconductor dies, a portion of the dielectric layer is removed from the back surface of the semiconductor dies to allow direct contact between the exposed back surface of the dies and a metallization layer forming part of the overmold. This direct contact allows heat energy to be drawn away from the dies.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: November 4, 2008
    Assignee: SiGe Semiconductor (U.S.), Corp.
    Inventors: Jose Harrison, Nicholas Nunns, William Vaillancourt
  • Publication number: 20070138614
    Abstract: In order to achieve electromagnetic and/or thermal isolation between components in close proximity to each other on a common module substrate, an alternate package and method for manufacturing the package is provided. Inventive methods utilize a grounded, metal-coated overmold for a IC module package that can provide an alternate thermal path to heat sink high power components generating excess heat energy and/or provide general electromagnetic shielding and isolation between two integrated circuits in very close proximity that are susceptible to electromagnetic interference. A dielectric layer conformably covers semiconductor dies mounted on a substrate. On some semiconductor dies, a portion of the dielectric layer is removed from the back surface of the semiconductor dies to allow direct contact between the exposed back surface of the dies and a metallization layer forming part of the overmold. This direct contact allows heat energy to be drawn away from the dies.
    Type: Application
    Filed: December 16, 2005
    Publication date: June 21, 2007
    Inventors: Jose Harrison, Nicholas Nunns, William Vaillancourt
  • Patent number: 7091790
    Abstract: A novel method and apparatus is disclosed for reducing power dissipation of RF power amplifiers when a reduced output power level is required. The mechanism has the specific purpose of optimizing the collector terminal voltage on portions of the amplifier's RF chain for maintaining linearity while minimizing power consumption. The apparatus permits a smaller DC to DC converter to be used than in prior art, such that it is implemented in the same semiconductor die or module. Furthermore, the invention eliminates the amplification and phase continuity issues that arise from switched state power amplifiers and envelope-following approaches.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: August 15, 2006
    Assignee: SiGe Semiconductor (U.S.), Corp.
    Inventors: Mark Doherty, Anthony Quaglietta, Jose Harrison
  • Publication number: 20050285681
    Abstract: A novel method and apparatus is disclosed for reducing power dissipation of RF power amplifiers when a reduced output power level is required. The mechanism has the specific purpose of optimizing the collector terminal voltage on portions of the amplifier's RF chain for maintaining linearity while minimizing power consumption. The apparatus permits a smaller DC to DC converter to be used than in prior art, such that it is implemented in the same semiconductor die or module. Furthermore, the invention eliminates the amplification and phase continuity issues that arise from switched state power amplifiers and envelope-following approaches.
    Type: Application
    Filed: June 25, 2004
    Publication date: December 29, 2005
    Inventors: Mark Doherty, Anthony Quaglietta, Jose Harrison