Patents by Inventor Jose J. Aizpuru

Jose J. Aizpuru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080224287
    Abstract: Using one or more reference indicators in die attaching an optoelectronic device to a lead during the assembly of an optoelectronic package. One example method of assembling an optoelectronic package includes detecting a reference indicator included in a first component of an optoelectronic package. The method also includes die attaching a second component to the optoelectronic package at a die attach location. The die attach location is substantially aligned with the reference indicator along a line that intersects the reference indicator and is parallel to either an x-axis or a y-axis of an x-y coordinate system associated with the optoelectronic package.
    Type: Application
    Filed: March 16, 2007
    Publication date: September 18, 2008
    Applicant: FINISAR CORPORATION
    Inventors: Jose J. Aizpuru, Harold Y. Walker
  • Patent number: 5466954
    Abstract: A phototransistor is provided with a first resistor that operates as a shunt and a second resistor that operates to protect the device from damage that could be caused by a reverse bias condition. The possible damage results from the creation of a PN junction relationship caused by the doping of N conductivity type material with P.sup.+ conductivity type material in order to form the first resistor. This junction relationship creates a parasitic diode that provides a current path between the emitter and collector terminals of the phototransistor. In order to prevent damage that might occur during a reverse voltage connection, a second resistor is connected between the emitter of transistor Q.sub.1 and the first resistor. The second resistor is in series with the junction relationship resulting from the structure used to form the first resistor and therefore serves to limit the current flowing between the emitter and collector terminals of the transistor under reversed bias conditions.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: November 14, 1995
    Assignee: Honeywell Inc.
    Inventors: Jose J. Aizpuru, Walter T. Matzen