Patents by Inventor Jose M. Capilla

Jose M. Capilla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9048752
    Abstract: An off-line power converter includes an integrated circuit power factor controller including a multi-function input terminal, a drive terminal for providing a drive signal to a gate of a drive transistor, a processing circuit coupled to the multi-function input terminal and, based on a signal received from the multi-function input terminal, providing at least one current signal representative of a current conducted in the off-line power converter, and at least one voltage signal representative of a voltage provided to a load, and a controller for providing the drive signal selectively in response to the at least one current signal and the at least one voltage signal.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: June 2, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jose M. Capilla, Joel Turchi
  • Publication number: 20140085947
    Abstract: An off-line power converter includes an integrated circuit power factor controller including a multi-function input terminal, a drive terminal for providing a drive signal to a gate of a drive transistor, a processing circuit coupled to the multi-function input terminal and, based on a signal received from the multi-function input terminal, providing at least one current signal representative of a current conducted in the off-line power converter, and at least one voltage signal representative of a voltage provided to a load, and a controller for providing the drive signal selectively in response to the at least one current signal and the at least one voltage signal.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Inventors: Jose M. Capilla, Joel Turchi
  • Patent number: 8183847
    Abstract: In one embodiment, a power supply controller is configured to turn off a first output transistor but inhibit turning off a second output transistor.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: May 22, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Jose M. Capilla, Olivier Causse
  • Publication number: 20110012578
    Abstract: In one embodiment, a power supply controller is configured to turn off a first output transistor but inhibit turning off a second output transistor.
    Type: Application
    Filed: September 27, 2010
    Publication date: January 20, 2011
    Inventors: Jose M. Capilla, Olivier Causse
  • Patent number: 7843181
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage to a desired value. The power supply controller is configured to turn off the first output transistor but inhibit turning off the second output transistor using two different control signals.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: November 30, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Jose M. Capilla, Olivier Causse
  • Patent number: 7728573
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage during a light load condition, and different control signals to control the switching of the output transistors facilitates rapidly reducing the output voltage.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: June 1, 2010
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Jose M. Capilla, Olivier Causse
  • Publication number: 20090261794
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage to a desired value. The power supply controller is configured to turn off the first output transistor but inhibit turning off the second output transistor using two different control signals.
    Type: Application
    Filed: January 25, 2007
    Publication date: October 22, 2009
    Inventors: Jose M. Capilla, Oliver Causse
  • Publication number: 20080315853
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage during a light load condition, and different control signals to control the switching of the output transistors facilitates rapidly reducing the output voltage.
    Type: Application
    Filed: October 24, 2005
    Publication date: December 25, 2008
    Inventors: Jose M. Capilla, Olivier Causse
  • Patent number: 6137154
    Abstract: An improved bipolar transistor (202) has an increased Early voltage and can be integrated on a semiconductor die with MOS transistors (201) and other types of devices to form an integrated circuit (200). A p-type base region (240) is disposed in an n-type collector region (252). An n-type emitter region (244) is disposed within the base region, and a p-type enhancement region (250) is formed to extend under the emitter region to a depth greater than the base depth. The improved bipolar transistor can be fabricated without significantly affecting the operation of other devices on the integrated circuit.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: October 24, 2000
    Assignee: Motorola, Inc.
    Inventor: Jose M. Capilla