Patents by Inventor Jose Mendes Carvalho
Jose Mendes Carvalho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10555081Abstract: An exciter device for transmitting vibration to a support is described. The exciter device comprises a housing, wherein a portion of the housing comprises an interior surface and an exterior surface, the interior surface disposed inside the housing and the exterior surface disposed outside the housing. An exciter is disposed on the interior surface. A rubber suspension is integrated into the portion of the housing. A printed circuit board comprising an amplifier forms a top of the exciter device.Type: GrantFiled: May 27, 2016Date of Patent: February 4, 2020Assignee: Intel CorporationInventors: Guillaume Denneulin, Serge Fabre, Hans Schipper, Jose Mendes Carvalho, Alberto J. Martinez, Sylvere Billout, Benoit Renault, Edward V. Gamsaragan
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Publication number: 20170347186Abstract: An exciter device for transmitting vibration to a support is described. The exciter device comprises a housing, wherein a portion of the housing comprises an interior surface and an exterior surface, the interior surface disposed inside the housing and the exterior surface disposed outside the housing. An exciter is disposed on the interior surface. A rubber suspension is integrated into the portion of the housing. A printed circuit board comprising an amplifier forms a top of the exciter device.Type: ApplicationFiled: May 27, 2016Publication date: November 30, 2017Applicant: Intel CorporationInventors: Guillaume Denneulin, Serge Fabre, Hans Schipper, Jose Mendes Carvalho, Alberto J. Martinez, Sylvere Billout, Benoit Renault, Edward V. Gamsaragan
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Patent number: 9086952Abstract: A method of managing a memory of an apparatus includes maintaining a plurality of lists of identifiers that each has an associated size value, wherein each identifier identifies a corresponding region of the memory that had been allocated for a process but that is currently not required by any of the one or more processes. When a process requests allocation of a region of the memory: one of the lists is identified that has an associated size value suitable for the allocation request; and if that list is not empty, a region of the memory is identified to the process by one of the identifiers that identifier is removed from that list, and, otherwise, a region of the memory is allocated with a size of the identified associated size value and the allocated region of the memory is identified the process.Type: GrantFiled: September 12, 2014Date of Patent: July 21, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Jean-Luc Robin, Jose Mendes-Carvalho
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Publication number: 20140380017Abstract: A method of managing a memory of an apparatus includes maintaining a plurality of lists of identifiers that each has an associated size value, wherein each identifier identifies a corresponding region of the memory that had been allocated for a process but that is currently not required by any of the one or more processes. When a process requests allocation of a region of the memory: one of the lists is identified that has an associated size value suitable for the allocation request; and if that list is not empty, a region of the memory is identified to the process by one of the identifiers that identifier is removed from that list, and, otherwise, a region of the memory is allocated with a size of the identified associated size value and the allocated region of the memory is identified the process.Type: ApplicationFiled: September 12, 2014Publication date: December 25, 2014Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: JEAN-LUC ROBIN, JOSE MENDES-CARVALHO
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Patent number: 8838928Abstract: A method of managing a memory of an apparatus, the apparatus executing one or more processes using the memory. The method comprises maintaining a plurality of lists of identifiers, wherein each list has an associated size value and an associated threshold corresponding to a maximum number of identifiers in that list, wherein each identifier identifies a corresponding region of the memory that had been allocated for a process but that is currently not required by any of the one or more processes, and wherein the size of a region of the memory identified by an identifier of a list equals the size value associated with that list.Type: GrantFiled: February 8, 2008Date of Patent: September 16, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Jean-Luc Robin, Jose Mendes-Carvalho
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Patent number: 8780705Abstract: A datagram flow optimizer apparatus comprises a buffer resource capable of receiving and temporarily storing a plurality of datagrams in respect of a forward path. The apparatus also comprises and a buffer controller arranged to implement, when in use, buffering of received datagrams by the buffer resource until a predetermined threshold number of datagrams has been stored by the buffer resource. The apparatus further comprises an acknowledgement regulator arranged to use the buffer resource to manipulate temporal spacing between acknowledgements of datagrams on a reverse path. The buffer controller is arranged to permit forwarding on the forward path of datagrams stored by the buffer resource in response to the predetermined threshold number of stored datagrams being reached.Type: GrantFiled: April 30, 2009Date of Patent: July 15, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Jean-Luc Robin, Jose Mendes-Carvalho
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Patent number: 8751841Abstract: A data processing system includes one or more processing unit arranged to execute sets of instructions stored in the data processing system. The sets may include two or more application sets, each forming an application sets and including instructions for scheduling for the application an event at a future point in time. The event may require the processing unit to be in an active mode. The sets may further include rescheduling instructions for receiving from the applications information about the scheduled events and determining whether or not one or more of the events can be rescheduled and rescheduling a reschedulable event to a new point in time. The sets may further include mode control instructions for controlling the processing unit to be in the active mode during a time interval which includes the new point in time and to be in a low power mode in which the processing unit consumes less energy than in the active mode during a period of time adjacent to the time interval.Type: GrantFiled: May 29, 2007Date of Patent: June 10, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Jose Mendes-Carvalho, Xavier Boucard, Yaney Rodriguez
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Patent number: 8510581Abstract: A method of managing the power up of a device that has power down state and at least two power up states. The method includes statistically analyzing the power up time profile of the device. The method also includes determining one or more predetermined statistical indicators associated with the stored power up time profile. The method further includes calculating an anticipated start up time from the statistical indicators. The method also includes at the anticipated start up time changing the device state from the power down state to a predetermined one of the power up states depending on the statistical indicators. The method further includes maintaining the device at predetermined power up states for a predetermined duration. The method also includes returning the device to the power down state if there is no user interaction with the device during the predetermined duration.Type: GrantFiled: March 26, 2007Date of Patent: August 13, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Jose Mendes Carvalho, Fabrice Cotdeloup, Yaney Rodriguez
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Publication number: 20120039174Abstract: A datagram flow optimizer apparatus comprises a buffer resource capable of receiving and temporarily storing a plurality of datagrams in respect of a forward path. The apparatus also comprises and a buffer controller arranged to implement, when in use, buffering of received datagrams by the buffer resource until a predetermined threshold number of datagrams has been stored by the buffer resource. The apparatus further comprises an acknowledgement regulator arranged to use the buffer resource to manipulate temporal spacing between acknowledgements of datagrams on a reverse path. The buffer controller is arranged to permit forwarding on the forward path of datagrams stored by the buffer resource in response to the predetermined threshold number of stored datagrams being reached.Type: ApplicationFiled: April 30, 2009Publication date: February 16, 2012Applicant: Freescale Semiconductor, Inc.Inventors: Jean-Luc Robin, Jose Mendes-Carvalho
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Publication number: 20100313046Abstract: A data processing system includes one or more processing unit arranged to execute sets of instructions stored in the data processing system. The sets may include two or more application sets, each forming an application sets and including instructions for scheduling for the application an event at a future point in time. The event may require the processing unit to be in an active mode. The sets may further include rescheduling instructions for receiving from the applications information about the scheduled events and determining whether or not one or more of the events can be rescheduled and rescheduling a reschedulable event to a new point in time. The sets may further include mode control instructions for controlling the processing unit to be in the active mode during a time interval which includes the new point in time and to be in a low power mode in which the processing unit consumes less energy than in the active mode during a period of time adjacent to the time interval.Type: ApplicationFiled: May 29, 2007Publication date: December 9, 2010Applicant: Freescale Semiconductor, Inc.Inventors: Jose Mendes-Carvalho, Xavier Boucard, Yaney Rodriguez
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Publication number: 20100312984Abstract: A method of managing a memory of an apparatus the apparatus executing one or more processes using the memory. The method comprises maintaining a plurality of lists of identifiers, wherein each list has an associated size value and an associated threshold corresponding to a maximum number of identifiers in that list, wherein each identifier identifies a corresponding region of the memory that had been allocated for a process but that is currently not required by any of the one or more processes, and wherein the size of a region of the memory identified by an identifier of a list equals the size value associated with that list.Type: ApplicationFiled: February 8, 2008Publication date: December 9, 2010Applicant: Freescale Semiconductor, Inc.Inventors: Jean-Luc Robin, Jose Mendes-Carvalho
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Publication number: 20100115309Abstract: A method of managing the power up of a device that has power down state; and at least two power up states, wherein the method includes the following steps: statistically analysing the power up time profile of the device; determining one or more predetermined statistical indicators associated with the stored power up time profile; calculating an anticipated start up time from the statistical indicators; at the anticipated start up time changing the device state from the power down state to a pre-determined one of the power up states depending on the statistical indicators; maintaining the device at pre-determined power up states for a predetermined duration; returning the device to the power down state if there is no user interaction with the device during the predetermined duration.Type: ApplicationFiled: March 26, 2007Publication date: May 6, 2010Applicant: Freescale Semiconductor, Inc.Inventors: Jose Mendes Carvalho, Fabrice Cotdeloup, Yaney Rodriguez