Abstract: An apparel location determining system for automatically determining the location of a user-specified wearable item within a plurality of possible independent inventory systems is described with each inventory system being located in a unique geographic location. The system has a user profile database with user records associated with different users. A user record may have a list of wearable items that are required by a corresponding user. The list of wearable items includes a list of composite descriptors of the wearable items. Each composite descriptor includes a user-selected type of wearable item and a user-specific predetermined size of the user. An availability database includes information relating to the availability of specific wearable items at each of the plurality of independent inventory systems. A central server interacts with a mobile telecommunications device.

Abstract: A system for automatically determining the location of a user-specified item within a plurality of possible independent inventory systems is described where each inventory system is located in a different unique geographic location. The system comprises a user profile database comprising a plurality of user records associated with a plurality of different users; at least one of the user records comprising a list of items that are required by a corresponding user; an availability database for providing information relating to the availability of specific items at each of the plurality of inventory systems, a central server for interacting with a mobile telecommunications device.

Abstract: From a first attribute-value pair in a record, new data is created including a first token. Using a first model and using a processor and a memory, each token is vectorized into new data including a corresponding vector. From the record, a target row is selected, wherein a target attribute-value pair in the target row includes a value for which a semantic similarity computation is to be performed. Using a similarity measure, a set of most similar rows to the target row is determined, wherein each row in the set of most similar rows to the target row has a corresponding similarity measure above a threshold similarity measure and wherein each row in the set of most similar rows includes the target attribute. The set of most similar rows is used to compute a response to a database query.

Abstract: Methods, systems and computer program products for updating a word embedding model are provided. Aspects include receiving a first data set comprising a relational database having a plurality of words. Aspects also include generating a word embedding model comprising a plurality of word vectors by training a neural network using unsupervised machine learning based on the first data set. Each word vector of the plurality of word vector corresponds to a unique word of the plurality of words. Aspects also include storing the plurality of word vectors and a representation of a hidden layer of the neural network. Aspects also include receiving a second data set comprising data that has been added to the relational database. Aspects also include updating the word embedding model based on the second data set and the stored representation of the hidden layer of the neural network.

Abstract: Techniques for noise impact on function (NIOF) reduction for an integrated circuit (IC) design are described herein. An aspect includes receiving a list of victim nets in which NIOF failures are present in an IC design. Another aspect includes attempting NIOF correction in each victim net of the list of victim nets. Another aspect includes, based on a failure of a NIOF correction in at least one victim net of the list of victim nets, saving the at least one victim net to a wire promote/demote list. Another aspect includes updating the list of victim nets based on the NIOF correction. Another aspect includes, based on determining that the updated list of victim nets is empty, promoting or demoting the at least one victim net from the wire promote/demote list in the IC design.

Abstract: Techniques for net routing for an integrated circuit (IC) design are described herein. An aspect includes receiving a netlist corresponding to a net in an IC design. Another aspect includes identifying intermediate logic in the net, wherein the intermediate logic is connected between a source and a sink of the net, and wherein the sink is located downstream from the source in the IC design. Another aspect includes hiding the intermediate logic from the netlist. Another aspect includes creating a global route in the IC design between the source and the sink of the net without the intermediate logic. Another aspect includes restoring the intermediate logic to the netlist. Another aspect includes placing the intermediate logic along the global route.

Abstract: A system for automatically determining the location of a user-specified item within a plurality of possible independent inventory systems is described where each inventory system is located in a different unique geographic location. The system comprises a user profile database comprising a plurality of user records associated with a plurality of different users; at least one of the user records comprising a list of items that are required by a corresponding user; an availability database for providing information relating to the availability of specific items at each of the plurality of inventory systems, a central server for interacting with a mobile telecommunications device.

Abstract: Techniques for noise impact on function (NIOF) reduction for an integrated circuit (IC) design are described herein. An aspect includes receiving a list of victim nets in which NIOF failures are present in an IC design. Another aspect includes attempting NIOF correction in each victim net of the list of victim nets. Another aspect includes, based on a failure of a NIOF correction in at least one victim net of the list of victim nets, saving the at least one victim net to a wire promote/demote list. Another aspect includes updating the list of victim nets based on the NIOF correction. Another aspect includes, based on determining that the updated list of victim nets is empty, promoting or demoting the at least one victim net from the wire promote/demote list in the IC design.

Abstract: Techniques for net routing for an integrated circuit (IC) design are described herein. An aspect includes receiving a netlist corresponding to a net in an IC design. Another aspect includes identifying intermediate logic in the net, wherein the intermediate logic is connected between a source and a sink of the net, and wherein the sink is located downstream from the source in the IC design. Another aspect includes hiding the intermediate logic from the netlist. Another aspect includes creating a global route in the IC design between the source and the sink of the net without the intermediate logic. Another aspect includes restoring the intermediate logic to the netlist. Another aspect includes placing the intermediate logic along the global route.

Abstract: Techniques for logic partition reporting for an integrated circuit (IC) design are described herein. An aspect includes generating a physical domain representation of an IC design based on a logic domain representation that includes a plurality of logic partitions, the physical domain representation including a plurality of logic clusters, each corresponding to a respective logic partition. Another aspect includes assigning a logic partition identifier corresponding to a logic partition of the plurality of logic partitions to each IC element in the physical domain representation. Another aspect includes assigning a pin name to each of the plurality of pins corresponding to the plurality of IC elements, wherein a pin name is derived based on the logic partition identifier of the IC element associated with the pin. Another aspect includes generating a timing report for a logic cluster based on the logic partition identifiers and the pin names.

Abstract: Techniques for an IC design include placing latches between a source and one or more sinks in the IC design, and performing an iterative process for maximizing slack on one or more input nets and one or more output nets for each of the latches, minimizing an absolute difference of the slack. The IC design includes optimizing routing for the latches and placing a clock gating latch in the IC design designated to control a LCB of LCBs. The IC design includes placing LCB logic in the IC design to control a required number of the LCBs, and placing a local clock buffer controller in the IC design in proximity to the positions of the latches.

Abstract: Techniques for latches include ordering latches by connectivity from a source to sinks. An iterative process is performed which includes selecting a selected latch in the connectivity, drawing a bounding box around the selected latch to encompass input nets and output nets, and using a two-dimensional optimizer to find a new placement location for selected latch by solving for optimization criteria. The optimization criteria includes maximizing slack on the input and output nets of the selected latch, minimizing an absolute difference of the slack between the input output nets, and identifying the new placement location within the bounding box that balances maximizing the slack on input and output nets versus minimizing the absolute difference of the slack between input nets and output nets. The current location of the selected latch is updated between the source and sinks to be the new placement location identified in the bounding box.

Abstract: Techniques for parallel power down processing of an integrated circuit (IC) design are described herein. An aspect includes receiving IC design information comprising a plurality of IC elements. Another aspect includes identifying a plurality of timing endpoints in the IC design information. Another aspect includes determining a plurality of nets, each net comprising a respective subset of the plurality of IC elements, based on the identified plurality of timing endpoints. Another aspect includes performing power down processing of net drivers in the plurality of nets, wherein the power down processing of at least a subset of the plurality of nets is performed in parallel.

Abstract: Techniques for logic partition identifiers for an integrated circuit (IC) design are described herein. An aspect includes receiving a logic domain representation of an IC design comprising a plurality of logic partitions each comprising a respective plurality of IC elements. Another aspect includes generating a physical domain representation of the IC design based on the logic domain representation comprising a plurality of logic clusters each corresponding to a respective logic partition, wherein each of the plurality of logic clusters comprises a respective plurality of IC elements. Another aspect includes assigning a logic partition identifier to each IC element in the physical domain representation, wherein the logic partition identifier of an IC element corresponds to a logic partition. Another aspect includes determining timing information for a logic partition based on the logic partition identifiers of the plurality of IC elements of a logic cluster associated with the logic partition.

Abstract: from a first attribute-value pair in a record, new data is created including a first token. Using a first model and using a processor and a memory, each token is vectorized into new data including a corresponding vector. From the record, a target row is selected, wherein a target attribute-value pair in the target row includes a value for which a semantic similarity computation is to be performed. Using a similarity measure, a set of most similar rows to the target row is determined, wherein each row in the set of most similar rows to the target row has a corresponding similarity measure above a threshold similarity measure and wherein each row in the set of most similar rows includes the target attribute. The set of most similar rows is used to compute a response to a database query.

Abstract: Methods, systems and computer program products for updating a word embedding model are provided. Aspects include receiving a first data set comprising a relational database having a plurality of words. Aspects also include generating a word embedding model comprising a plurality of word vectors by training a neural network using unsupervised machine learning based on the first data set. Each word vector of the plurality of word vector corresponds to a unique word of the plurality of words. Aspects also include storing the plurality of word vectors and a representation of a hidden layer of the neural network. Aspects also include receiving a second data set comprising data that has been added to the relational database. Aspects also include updating the word embedding model based on the second data set and the stored representation of the hidden layer of the neural network.

Abstract: Methods, systems and computer program products for determining recommended parameters for use in generating a word embedding model are provided. Aspects include storing a plurality of meaningful test cases. Each meaningful test case includes a test data profile and one or more test model parameters used to create a word embedding model that has been classified as yielding meaningful results. Aspects include receiving a production data set to be used in generating a new word embedding model. The production data set includes data stored in a relational database having a plurality of columns and a plurality of rows. Aspects include generating a data profile associated with the production data set. Aspects include generating a recommendation for one or more production model parameters for use in building a word embedding model based on the data profile associated with the production data set and the plurality of meaningful test cases.

Abstract: The present disclosure provides a threaded cap (11) and neck (12) set for evidencing tampering with container (13), comprising a neck (12) of a container (13) having a cylindrical shape and an aperture at its top end, the neck (12) having threads on its outer surface and a sealing collar (14), the sealing collar (14) comprising a plurality of teeth (15) and a cap (1) having a cylindrical shape and having threads on its inner surface, the cap (11) including a tamper-evident ring (16) attached to the lower rim (17) of the cap (11), said tamper-evident ring (16) having a diameter longer than the diameter of the cap (11). The tamper-evident ring (16) comprises multiple reversible grippers (18) projecting longitudinally from the lower rim (17) of the tamper-evident ring (16), wherein the reversible grippers (18) are coupled to the lower rim (17) of the tamper-evident ring (16) by a hingeable membrane.

Abstract: An integrated Circlet chip is made using Genie, a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.

Abstract: An integrated circuit chip is made using Genie, a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.