Patents by Inventor Jose Ordonez

Jose Ordonez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5516412
    Abstract: An electroplating cell includes a floor, ceiling, front wall, and back wall forming a box having first and second opposite open ends. A rack for supporting an article to be electroplated is removably positioned vertically to close the first open end and includes a thief laterally surrounding the article to define a cathode. An anode is positioned vertically to close the second open end, with the assembly defining a substantially closed, six-sided inner chamber for receiving an electrolyte therein for electroplating the article. The article and surrounding thief are coextensively aligned with the anode, with the floor, ceiling, front and back walls being effective for guiding electrical current flux between the cathode and the anode. In a preferred embodiment, the cell is disposed as an inner cell inside an outer cell substantially filled with the electrolyte, and a paddle is disposed inside the inner cell for agitating the electrolyte therein.
    Type: Grant
    Filed: May 16, 1995
    Date of Patent: May 14, 1996
    Assignee: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, Kirk G. Berridge, John O. Dukovic, Matteo Flotta, Jose Ordonez, Helmut R. Poweleit, Jeffrey S. Richter, Lubomyr T. Romankiw, Otto P. Schick, Frank Spera, Kwong-Hon Wong
  • Patent number: 4545610
    Abstract: A process for forming elongated solder terminals to connect a plurality of pads on a semiconductor device to a corresponding plurality of pads on a supporting substrate by,forming a means to maintain a predetermined vertical spacing between the semiconductor and the supporting substrate outside the area of the pads,forming and fixing solder extenders to each of the solder wettable pads on the substrate or the device to be joined,positioning the semiconductor device provided with solder mounds on the solder mountable pads over the supporting substrate with the solder mound in registry and with the pads on the substrate with the solder extenders positioned therebetween, the means to maintain vertical spacing located between and in abutting relation to the device and substrate, andheating the resulting assembly to reflow the solder mounds and the solder extenders while maintaining a predetermined spacing thus forming a plurality of hour-glass shaped elongated connections.
    Type: Grant
    Filed: November 25, 1983
    Date of Patent: October 8, 1985
    Assignee: International Business Machines Corporation
    Inventors: Mark N. Lakritz, Jose Ordonez, Peter J. Tubiola