Patents by Inventor Jose Saiz

Jose Saiz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9987930
    Abstract: A railroad network (10) having a track (12), a network energy supply (14) and a plurality of trains (16) that are connectable to the network energy supply (14) via means (20) for connecting the train (16) to the network energy supply (14) and each have an internal energy storage system (24) for receiving and storing energy originating from said train (16) or from trains (16) of the railroad network (10) and for supplying energy to said train (16) or to trains (16) of the railroad network (10). Each train (16) is able to switch from an operational state in which it is able to move along the system of rails (12) and an idle state in which it is unable to move along the system of rails (12) and vice versa. At least one of the trains (16) of the railroad network (10) is in the idle and energized state at the same time, its internal energy storage system (24) being connected to the network energy supply (14).
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: June 5, 2018
    Assignee: ALSTOM Transport Technologies
    Inventors: Robert Periot, Jose Saiz, Dominique Jamet
  • Publication number: 20150008733
    Abstract: A railroad network (10) having a track (12), a network energy supply (14) and a plurality of trains (16) that are connectable to the network energy supply (14) via means (20) for connecting the train (16) to the network energy supply (14) and each have an internal energy storage system (24) for receiving and storing energy originating from said train (16) or from trains (16) of the railroad network (10) and for supplying energy to said train (16) or to trains (16) of the railroad network (10). Each train (16) is able to switch from an operational state in which it is able to move along the system of rails (12) and an idle state in which it is unable to move along the system of rails (12) and vice versa. At least one of the trains (16) of the railroad network (10) is in the idle and energized state at the same time, its internal energy storage system (24) being connected to the network energy supply (14).
    Type: Application
    Filed: March 5, 2013
    Publication date: January 8, 2015
    Applicant: ALSTOM Transport Technologies
    Inventors: Robert Periot, Jose Saiz, Dominique Jamet
  • Patent number: 7859079
    Abstract: The present invention relates to a power semiconductor device comprising a switching power semiconductor element, and a free wheeling diode in anti-parallel connection to the switching power semiconductor element. The power semiconductor is characterized in that a reverse electrode of the switching power semiconductor element and a reverse electrode of the free wheeling diode are bonded and mounted on a circuit pattern formed on the main surface of the first substrate, and that a circuit pattern, which is so formed on the main surface of the second substrate as to oppose a surface electrode of the switching power semiconductor element and a surface electrode of the free wheeling diode, is connected to the surface electrodes of the switching power semiconductor element and the free wheeling diode through connective conductors to be soldered, respectively.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: December 28, 2010
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Alstom Transport SA
    Inventors: Makoto Kondou, Kiyoshi Arai, Jose Saiz, Pierre Solomalala, Emmanuel Dutarde, Benoit Boursat, Philippe Lasserre
  • Publication number: 20090250781
    Abstract: The present invention relates to a power semiconductor device comprising a switching power semiconductor element, and a free wheeling diode in anti-parallel connection to the switching power semiconductor element. The power semiconductor is characterized in that a reverse electrode of the switching power semiconductor element and a reverse electrode of the free wheeling diode are bonded and mounted on a circuit pattern formed on the main surface of the first substrate, and that a circuit pattern, which is so formed on the main surface of the second substrate as to oppose a surface electrode of the switching power semiconductor element and a surface electrode of the free wheeling diode, is connected to the surface electrodes of the switching power semiconductor element and the free wheeling diode through connective conductors to be soldered, respectively.
    Type: Application
    Filed: April 21, 2009
    Publication date: October 8, 2009
    Applicants: MITSUBISHI DENKI KABUSHIKI KAISHA, ALSTOM TRANSPORT SA
    Inventors: Makoto Kondou, Kiyoshi Arai, Jose Saiz, Pierre Solomalala, Emmanuel Dutarde, Benoit Boursat, Philippe Lasserre
  • Patent number: 7535076
    Abstract: The present invention relates to a power semiconductor device comprising a switching power semiconductor element, and a free wheeling diode in anti-parallel connection to the switching power semiconductor element. The power semiconductor is characterized in that a reverse electrode of the switching power semiconductor element and a reverse electrode of the free wheeling diode are bonded and mounted on a circuit pattern formed on the main surface of the first substrate, and that a circuit pattern, which is so formed on the main surface of the second substrate as to oppose a surface electrode of the switching power semiconductor element and a surface electrode of the free wheeling diode, is connected to the surface electrodes of the switching power semiconductor element and the free wheeling diode through connective conductors to be soldered, respectively.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: May 19, 2009
    Assignee: Alstom Transport SA
    Inventors: Makoto Kondou, Kiyoshi Arai, Jose Saiz, Pierre Solomalala, Emmanuel Dutarde, Benoit Boursat, Philippe Lasserre
  • Patent number: 7479693
    Abstract: One of the aspects of the present invention is to provide a power semiconductor device, including a first substrate having a first circuit pattern formed thereon, and a second substrate having a second circuit pattern formed thereon. The first substrate has a first center line extending along a predetermined transverse direction. At least one power semiconductor chip is mounted on the first circuit pattern of the first substrate, and has at least one chip electrode opposing to the second circuit pattern of the second substrate. Also, a plurality of first conductive connectors on the first circuit pattern is provided for electrical connection with the second circuit pattern of the second substrate. The first conductive connectors are arranged symmetrically in relative to the first center line of the first substrate.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: January 20, 2009
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Alstom Transport SA
    Inventors: Makoto Kondou, Kiyoshi Arai, Jose Saiz, Pierre Solomalala, Emmanuel Dutarde, Benoit Boursat, Philippe Lasserre
  • Patent number: 7042725
    Abstract: A power switching module is provided having at least one power switch placed above at least one other power switch, each power switch in turn including an upper wall and a lower wall, each of which is cooled through thermal conduction by a cooling medium that circulates in channels and voids that are provided along the walls for this purpose.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: May 9, 2006
    Assignee: Alstom
    Inventors: Nathalie Martin, Benoit Boursat, Emmanuel Dutarde, Jose Saiz, Jacques Cettour-Rose, Pierre Solomalala
  • Patent number: 6836125
    Abstract: A method of testing a power module including a control gate, an emitter, a collector, at least one power component on a dielectric substrate and a diode connected in antiparallel with the power component measures partial discharges occurring between the emitter and the collector when an alternating current voltage source superimposed on a direct current voltage source is connected between the collector and the emitter of the power module. The voltage Vtest received by the power module between the collector and the emitter verifies at all times the condition Vtest>0 so that the diode never conducts. The power component is maintained in a turned off state during the test by a direct current voltage source connected between the control gate and the emitter.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: December 28, 2004
    Assignee: Alstom
    Inventors: Fabrice Breit, Sorin Dinculescu, Emmanuel Dutarde, Thierry Lebey, José Saiz
  • Publication number: 20040207968
    Abstract: A power switching module is provided having at least one power switch placed above at least one other power switch, each power switch in turn including an upper wall and a lower wall, each of which is cooled through thermal conduction by a cooling medium that circulates in channels and voids that are provided along the walls for this purpose.
    Type: Application
    Filed: April 8, 2004
    Publication date: October 21, 2004
    Applicant: ALSTOM
    Inventors: Nathalie Martin, Benoit Boursat, Emmanuel Dutarde, Jose Saiz, Jacques Cettour-Rose, Pierre Solomalala
  • Patent number: 6586783
    Abstract: An electronic power circuit substrate including a wafer of electrically insulating material, wherein said wafer presents a face supporting one or more conductive tracks directly connected to one or more electronic power components, said conductive tracks being obtained by fine metallization of said face to a thickness that is less than 150 &mgr;m.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: July 1, 2003
    Assignee: Alstom
    Inventors: Benoît Boursat, Emmanuel Dutarde, Nathalie Martin, Pierre Solomalala, José Saiz
  • Publication number: 20030025522
    Abstract: A method of testing a power module including a control gate, an emitter, a collector, at least one power component on a dielectric substrate and a diode connected in antiparallel with the power component measures partial discharges occurring between the emitter and the collector when an alternating current voltage source superimposed on a direct current voltage source is connected between the collector and the emitter of the power module. The voltage Vtest received by the power module between the collector and the emitter verifies at all times the condition Vtest>0 so that the diode never conducts. The power component is maintained in a turned off state during the test by means of a direct current voltage source connected between the control gate and the emitter.
    Type: Application
    Filed: July 23, 2002
    Publication date: February 6, 2003
    Applicant: ALSTOM
    Inventors: Fabrice Breit, Sorin Dinculescu, Emmanuel Dutarde, Thierry Lebey, Jose Saiz
  • Publication number: 20020125505
    Abstract: An electronic power circuit substrate including a wafer of electrically insulating material, wherein said wafer presents a face supporting one or more conductive tracks directly connected to one or more electronic power components, said conductive tracks being obtained by fine metallization of said face to a thickness that is less than 150&mgr;m.
    Type: Application
    Filed: January 31, 2002
    Publication date: September 12, 2002
    Applicant: ALSTOM
    Inventors: Benoit Boursat, Emmanuel Dutarde, Nathalie Martin, Pierre Solomalala, Jose Saiz
  • Publication number: 20020053720
    Abstract: A substrate for an electronic circuit, the substrate comprising a wafer of silicon Si having a top face covered in an electrically insulating layer of silicon nitride SiN, said electrically insulating layer of silicon nitride supporting one or more conductive tracks obtained by metallizing the top face of said electrically insulating layer for the purpose of enabling one or more electronic components to be connected.
    Type: Application
    Filed: September 14, 2001
    Publication date: May 9, 2002
    Applicant: ALSTOM
    Inventors: Benoit Boursat, Emmanuel Dutarde, Luc Meysenc, Jose Saiz, Pierre Solomalala