Abstract: A method for operating a computing system on at least one processor includes performing search space reduction on input data using a first trained artificial intelligence model to generate relevant regions in the input data. The method also includes generating region proposals in the relevant regions using a second trained artificial intelligence model. The method further includes performing unsupervised anomaly classification on the region proposals using a third trained artificial intelligence model to classify each of the region proposals as normal or as an anomaly. The method further includes performing contextual filtering on the region proposals classified as anomalies to determine if any of the region proposals classified as anomalies are contextually normal using a fourth trained artificial intelligence model.

Abstract: A method for operating a computing system on at least one processor includes performing search space reduction on input data using a first trained artificial intelligence model to generate relevant regions in the input data. The method also includes generating region proposals in the relevant regions using a second trained artificial intelligence model. The method further includes performing unsupervised anomaly classification on the region proposals using a third trained artificial intelligence model to classify each of the region proposals as normal or as an anomaly. The method further includes performing contextual filtering on the region proposals classified as anomalies to determine if any of the region proposals classified as anomalies are contextually normal using a fourth trained artificial intelligence model.

Abstract: Techniques and mechanisms for a processor to efficiently identify a circuit resource as being a source of data poisoning. In an embodiment, metadata is communicated, in association with a communication of poisoned data to which the metadata pertains, to a first circuit block of a processor. The metadata indicates a poisoned state of the data, wherein the metadata identifies a second circuit block—which is included in or coupled to the processor—as being a poisoner of the data. Based on the metadata, the first circuit block generates a fault message which identifies the second circuit block as the poisoner of the data. In another embodiment, the processor further comprises the second circuit block, which poisons the data (based on the detection of an error condition) by providing in the metadata a unique identifier which is assigned to the second circuit block.

Abstract: Techniques and mechanisms for a processor to efficiently identify a circuit resource as being a source of data poisoning. In an embodiment, metadata is communicated, in association with a communication of poisoned data to which the metadata pertains, to a first circuit block of a processor. The metadata indicates a poisoned state of the data, wherein the metadata identifies a second circuit block—which is included in or coupled to the processor—as being a poisoner of the data. Based on the metadata, the first circuit block generates a fault message which identifies the second circuit block as the poisoner of the data. In another embodiment, the processor further comprises the second circuit block, which poisons the data (based on the detection of an error condition) by providing in the metadata a unique identifier which is assigned to the second circuit block.

Abstract: A system for processing biological specimens mounted on microscope slides by adding and removing processing fluids from microscope slides by means of capillary action using a slide holder capable of holding multiple microscope slides, and a spacer positioned in between two slides of a slide pair to create a capillary gap. A capillary gap adjuster can be used to pinch and release one end of the slide pair to create a pulsatile action to mix the reagent within the capillary gap. The system may further include a reagent holder, an absorbent pad, a series of reagent baths, and an incubator for holding one or more slide holders.

Abstract: A vehicle driver exercising system includes a pair of hand exercising members each removably engaged with a steering wheel. The hand exercising members each include a clip having an inner surface and an outer surface. The clip receives the steering wheel and a base is attached to the outer surface. A housing is slidably mounted to an upper surface of the base and has an outer flange is movable between an extended position extended upwardly from and spaced away from the base or a collapsed position abutting the base. A biasing member is positioned in the base and biases the housing toward the extended position.

Abstract: A system for processing biological specimens mounted on microscope slides by adding and removing processing fluids from microscope slides by means of capillary action using a slide holder capable of holding multiple microscope slides, and a spacer positioned in between two slides of a slide pair to create a capillary gap. A capillary gap adjuster can be used to pinch and release one end of the slide pair to create a pulsatile action to mix the reagent within the capillary gap. The system may further include a reagent holder, an absorbent pad, a series of reagent baths, and an incubator for holding one or more slide holders.

Abstract: Techniques for using measurements made by UEs to improve network performance are described. In one aspect, RF parameters of cells may be determined by taking into account mobility of the UEs. Mobility information for the UEs may be determined based on measurement report messages (MRMs) sent by these UEs for handover. RF parameters such as antenna down-tilt, antenna orientation, antenna pattern, and/or pilot power of the cells may be determined based on the mobility information for the UEs. In another aspect, the RF parameters of cells may be dynamically adjusted based on loading conditions of cells. In yet another aspect, the location of a UE may be determined based on an MRM sent by the UE for handover. The MRM may include timing measurements for multiple cells. The location of the UE may be determined based on the timing measurements.

Abstract: Configurable error handling apparatus and methods to operate the same are disclosed. An example apparatus comprises a processor core in a semiconductor package, a hardware functional block in the semiconductor package, an error handler in the semiconductor package, wherein the error handler is configurable to route error data from the hardware functional block to at least one of a first error log or a second error log and to route error signals from the hardware functional block to at least one of an operating system or firmware, and wherein the processor core configures the error handler and the hardware functional block.

Abstract: Methods and architectures for performing hardware error handling using coordinated operating system (OS) and firmware services. In one aspect, a firmware interface is provided to enable an OS to access firmware error-handling services. Such services enable the OS to access error data concerning platform hardware errors that may not be directed accessed via a platform processor or through other conventional approaches. Techniques are also disclosed for intercepting the processing of hardware error events and directing control to firmware error-handling services prior to attempting to service the error using OS-based services. The firmware services may correct hardware errors and/or log error data that may be later accessed by the OS or provided to a remote management server using an out-of-band communication channel. In accordance with another aspect, the firmware intercept and services may be performed in a manner that is transparent to the OS.

Abstract: The invention relates to series reactor beds containing different oligomerization catalysts and having independent temperature control, and processes for the oligomerization of light olefins to heavier olefins using such series reactor beds.

Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.

Abstract: A method for assigning a device to a first virtual machine includes connecting the device, directly or indirectly, to a computer through an interconnect. The first virtual machine and a second virtual machine are run on the computer. The device is assigned to the first virtual machine for exclusive use by the first virtual machine, and the assignment is enforced.

Abstract: A wireless silencing device transmits a wireless silence signal in or near a region where extraneous sound is undesired. Wireless devices in receipt of the wireless silence signal may use the signal to determine whether to enable an auto silence mode of operation.

Abstract: Techniques for selectively forwarding interrupt signals to virtual machines.

Abstract: A method for accessing a configuration data space for a device connected to a processor through an interconnect includes receiving a request from the processor to access the processor's addressable space. The request is generated in response to receiving an instruction intended to access the device's configuration data space. A map between the device's configuration data space and the processor's addressable space is accessed, the map having previously mapped the device's configuration data space to one or more pages of the processor's addressable space. Using the map, the request from the processor is translated into a configuration cycle on the interconnect to access the device's configuration data space.

Abstract: An apparatus for generating an inhomogeneous electric field that can produce thrust having a first electrode constructed of a first conducting material, a second electrode constructed of a second conducting material separated from but in proximity of the first electrode and a first and second dielectric material interposed between the first and second electrodes, the first and second dielectric materials having a high and low mass density, respectively.

Abstract: Methods and devices for producing inhomogeneous electrical fields are disclosed.

Abstract: A device for generating an inhomogeneous electrical field includes first and second electrodes. The first electrode may be a portion of a sphere, a cone, a paraboloid, a cylinder; a hollow sphere, a hollow cone, a hollow paraboloid, or a hollow cylinder. The second electrode may be a portion of a sphere, a cone, a paraboloid, a cylinder, a hollow sphere, a hollow cone, a hollow paraboloid or a hollow cylinder. The first and second electrodes are aligned to produce an inhomogeneous electric field when charged with a voltage potential and generate a gravitational effect. The second electrode may be at least partially concentric with said first electrode.

Abstract: A method for accessing a configuration data space for a device connected to a processor through an interconnect includes receiving a request from the processor to access the processor's addressable space. The request is generated in response to receiving an instruction intended to access the device's configuration data space. A map between the device's configuration data space and the processor's addressable space is accessed, the map having previously mapped the device's configuration data space to one or more pages of the processor's addressable space. Using the map, the request from the processor is translated into a configuration cycle on the interconnect to access the device's configuration data space.