Patents by Inventor Josef Gluch

Josef Gluch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7161365
    Abstract: An apparatus for enabling connection to a ground plane of a test board during the testing of contacts on the board, comprising a conductive ground plate overlying said ground plane having at least one opening which overlies contacts on the board to be tested, the ground plate having a top side and an underside, there being at least one conductive abutment on the underside of the ground plate which contacts the ground plane, whereby connection to the ground plane may be made by contacting the top side of the ground plate during testing of the contacts.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: January 9, 2007
    Assignee: Infineon Technologies AG
    Inventors: Josef Gluch, Boris Safin, David Karasiewicz
  • Patent number: 7132843
    Abstract: A method and apparatus for positioning a test head with respect to a printed circuit board. Adjusting marks having two parts, a frame and a mark positioned within a region enclosed by the frame, are provided on the printed circuit board. The frame and the mark within the frame are at a defined potential, which may be measured by the test head. Methods for positioning the test head are provided whereby the test head is initially positioned within an area bounded by the frame of the first adjusting mark and the test head is then re-positioned via a search algorithm which determines the coordinates of the mark within the region enclosed by the frame; the steps of positioning and repositioning of the test head are repeated at a second adjusting mark, and the determined coordinates are used to determine positioning of the test head.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: November 7, 2006
    Assignee: Infineon Technologies AG
    Inventors: Josef Gluch, Boris Safin
  • Publication number: 20060103369
    Abstract: An apparatus for enabling connection to a ground plane of a test board during the testing of contacts on the board, comprising a conductive ground plate overlying said ground plane having at least one opening which overlies contacts on the board to be tested, the ground plate having a top side and an underside, there being at least one conductive abutment on the underside of the ground plate which contacts the ground plane, whereby connection to the ground plane may be made by contacting the top side of the ground plate during testing of the contacts.
    Type: Application
    Filed: November 4, 2004
    Publication date: May 18, 2006
    Inventors: Josef Gluch, Boris Safin, David Karasiewicz
  • Publication number: 20050043826
    Abstract: Two-part adjusting marks are provided on a printed circuit board. In this case, a frame encloses a region in which at least one mark is arranged. The frame and the mark are at a defined potential, which can be recorded by the test head.
    Type: Application
    Filed: June 9, 2004
    Publication date: February 24, 2005
    Inventors: Josef Gluch, Boris Safin
  • Publication number: 20040220765
    Abstract: In a test system for testing an integrated circuit device, a software program that receives instructions from a user and issues commands to the test system for testing the integrated circuit device in accordance with the user instructions is provided. The software program includes computer program code for receiving an instruction from the user, computer program code for generating a generic command based upon the user instruction, the generic command being independent of the test system that is being used to test the integrated circuit device, computer program code for translating the generic command into a test system specific command, computer program code for providing the test system specific command to the test system, and computer program code for receiving a test result from the test system, the test result being provided in response to the test system specific command and indicative of a result of a test performed on the integrated circuit device.
    Type: Application
    Filed: February 27, 2004
    Publication date: November 4, 2004
    Inventor: Josef Gluch