Patents by Inventor Joseph A. Jacobs

Joseph A. Jacobs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960357
    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 16, 2024
    Assignee: VMware LLC
    Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
  • Publication number: 20240103386
    Abstract: An apparatus for determining a condition associated with a pellicle for use in a lithographic apparatus, the apparatus including a sensor, wherein the sensor is configured to measure a property associated with the pellicle, the property being indicative of the pellicle condition.
    Type: Application
    Filed: October 3, 2023
    Publication date: March 28, 2024
    Applicants: ASML NETHERLANDS B.V., ASML HOLDING N.V.
    Inventors: Derk Servatius Gertruda BROUNS, Joshua ADAMS, Aage BENDIKSEN, Richard JACOBS, Andrew JUDGE, Veera Venkata Narasimha Narendra Phani KOTTAPALLI, Joseph Harry LYONS, Theodorus Marinus MODDERMAN, Manish RANJAN, Marcus Adrianus VAN DE KERKHOF, Xugang XIONG
  • Publication number: 20240065400
    Abstract: Various types of travel bags are provided with at least one portable self-contained vacuum compression system having a portable vacuum pump powered by a portable, preferably removable, rechargeable battery, a compression connection system, and a vacuum compression bag secured within the interior space of the travel bag. The portable self-contained vacuum compression system allows the user to pack more clothing or compressible goods into their travel bag via the use of vacuum compression. The air inside the compression bag can be evacuated by the attached self-contained vacuum pump assembly which is secured within the travel bag in a manner to hold the self-contained vacuum system within the travel bag's internal dimensions in one embodiment. The vacuum compression system can be held in place via a removable or a fixed frame that permits operation of the vacuum compression system within the internal dimensions of the travel bag.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: JOSEPH M. MAJHESS, MARK A. JACOBS, CRAIG BENSON, KEVIN ELLSWORTH, SALVADOR HERRERA
  • Publication number: 20240043644
    Abstract: A coated viscoelastic polyurethane foam includes a viscoelastic polyurethane foam having the coating thereon, the viscoelastic polyurethane foam having a resiliency of less than or equal to 20% as measured according to ASTM D3574, and a coating material on and embedded within the viscoelastic polyurethane foam, the coating material including an aqueous polymer emulsion and an encapsulated phase change material.
    Type: Application
    Filed: October 6, 2023
    Publication date: February 8, 2024
    Inventors: Kaoru Aou, Yibei Gu, Rajat Duggal, Yasmin N. Srivastava, Joseph Jacobs, Qinghao Meng, Gregoire Cardoen, Ralph C. Even, Morgan A. Springs
  • Publication number: 20240028359
    Abstract: In one set of embodiments, new hardware-assisted virtualization features for a CPU are provided that include, among other things: (1) a new control structure that allows a kernel level hypervisor component to set, for each configurable property/setting maintained in an existing control structure, whether the property/setting is accessible from an unprivileged hypervisor mode of the CPU, (2) another new control structure that allows the kernel level hypervisor component to set, for each of a plurality of guest events or operations, whether the guest event or operation will cause a transition from a privileged or unprivileged guest mode of the CPU to the unprivileged hypervisor mode, and (3) the ability for the CPU to transition directly from the unprivileged hypervisor mode to the privileged or unprivileged guest mode.
    Type: Application
    Filed: July 19, 2022
    Publication date: January 25, 2024
    Inventors: Sam Scalise, Frederick Joseph Jacobs, James Kenneth White
  • Publication number: 20240028336
    Abstract: In one set of embodiments, an operating system (OS) kernel of a computer system can receive an invocation of a system call by a user program running on the computer system. The OS kernel can further fetch a plurality of subsequent instructions that will be executed by the user program after the invocation of the system call and decode the plurality of subsequent instructions into a plurality of decoded instructions. The OS kernel can then analyze whether the plurality of decoded instructions include an additional system call invocation and whether other decoded instructions that appear between the invocation of the system call and the additional system call invocation are viable for emulation by the OS kernel.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventors: Frederick Joseph Jacobs, Sam Scalise, Martim Carbone
  • Publication number: 20230348892
    Abstract: The present disclosure relates generally to genetic engineering of cells to perform specific and complex functions. In particular, the present disclosure relates to engineered mammalian cells and methods of engineering mammalian cells, as well as novel multi-functional proteins integrating both transcriptional and post-translational control effectively linking genetic circuits with sensors for multi-input evaluations.
    Type: Application
    Filed: September 16, 2021
    Publication date: November 2, 2023
    Applicant: Northwestern University
    Inventors: Joshua N. Leonard, Joseph Jacob Muldoon, Patrick Sean Donahue
  • Publication number: 20230259421
    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.
    Type: Application
    Filed: April 24, 2023
    Publication date: August 17, 2023
    Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
  • Publication number: 20230195533
    Abstract: A method of populating page tables of an executing workload during migration of the executing workload from a source host to a destination host includes the steps of: during transmission of memory pages of the executing workload from the source host to the destination host, populating the page tables of the workload at the destination host, wherein the populating comprises inserting mappings from virtual addresses of the workload to physical addresses of system memory of the destination host for all of the memory pages of the executing workload; and upon completion of transmission of all of the memory pages of the workload, resuming the workload at the destination host.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Inventors: Yury BASKAKOV, Ying YU, Anurekh SAXENA, Arunachalam RAMANATHAN, Frederick Joseph JACOBS, Giritharan RASHIYAMANY
  • Patent number: 11668422
    Abstract: A coupler including a tubular conduit having a length disposed between a first end and a second end and a thickness disposed between an external surface and internal surface defining an interior passage, and a tubular guide, coupled to the first end, widening between the first end and a tubular guide terminal end of the tubular guide.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: June 6, 2023
    Assignee: Cobalt Coupler Systems, LLC
    Inventor: Jon Joseph Jacobs
  • Patent number: 11669388
    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: June 6, 2023
    Assignee: VMware, Inc.
    Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P Mann, Frederick Joseph Jacobs
  • Publication number: 20230151913
    Abstract: Pipe connectors and methods of making and using pipe connectors to connect oil or gas pipe in oil and gas production, refining and distribution.
    Type: Application
    Filed: January 16, 2023
    Publication date: May 18, 2023
    Applicant: Cobalt Coupler Systems, LLC
    Inventors: Jon Joseph Jacobs, Lonnie Joseph Jacobs, Robert Wayne Noyer, Lloyd Dale Seaton
  • Patent number: 11586371
    Abstract: A method of populating page tables of an executing workload during migration of the executing workload from a source host to a destination host includes the steps of: before resuming the workload at the destination host, populating the page tables of the workload at the destination host, wherein the populating comprises inserting mappings from virtual addresses of the workload to physical addresses of system memory of the destination host; and upon completion of populating the page tables, resuming the workload at the destination host.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: February 21, 2023
    Assignee: VMware, Inc.
    Inventors: Yury Baskakov, Ying Yu, Anurekh Saxena, Arunachalam Ramanathan, Frederick Joseph Jacobs, Giritharan Rashiyamany
  • Publication number: 20230033318
    Abstract: A reaction system for forming a viscoelastic polyurethane foam includes an isocyanate component and an isocyanate-reactive component that includes at least a polyol component, an additive component, and a preformed aqueous polymer dispersant. The mixture includes 50.0 wt % to 99.8 wt % of the polyol component, 0.1 wt % to 49.9 wt % of the additive component, and 0.1 wt % to 6.0 wt % of the preformed aqueous polymer dispersant. The aqueous polymer dispersant has a pH from 6.0 to 12.0 and includes from 5 wt % to 60 wt % of a polymeric component and from 40 wt % to 95 wt % of a fluid medium. The polymeric component includes at least one base polymer derived from 20 wt % to 100 wt % of at least one hydrophilic acid monomer having at least one carbonyl group, phosphate group, phosphonate group, or sulfonyl group, and optionally derived from at least one hydrophobic terminally unsaturated hydrocarbon monomer.
    Type: Application
    Filed: July 23, 2021
    Publication date: February 2, 2023
    Inventors: Kaoru Aou, Thomas H. Kalantar, Qinghao Meng, John Klier, Antony K. Van Dyk, Gary W. Dombrowski, Joseph Jacobs
  • Publication number: 20230023452
    Abstract: A method of populating page tables of an executing workload during migration of the executing workload from a source host to a destination host includes the steps of: before resuming the workload at the destination host, populating the page tables of the workload at the destination host, wherein the populating comprises inserting mappings from virtual addresses of the workload to physical addresses of system memory of the destination host; and upon completion of populating the page tables, resuming the workload at the destination host.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Inventors: Yury BASKAKOV, Ying YU, Anurekh SAXENA, Arunachalam RAMANATHAN, Frederick Joseph JACOBS, Giritharan RASHIYAMANY
  • Patent number: 11560972
    Abstract: Pipe connectors and methods of making and using pipe connectors to connect oil or gas pipe in oil and gas production, refining and distribution.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: January 24, 2023
    Assignee: Cobalt Coupler Systems, LLC
    Inventors: Jon Joseph Jacobs, Lonnie Joseph Jacobs, Robert Wayne Noyer, Lloyd Dale Seaton
  • Publication number: 20220351980
    Abstract: Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.
    Type: Application
    Filed: March 2, 2020
    Publication date: November 3, 2022
    Inventors: Douglas Hasso, Yinzhong Guo, James M. Lipovsky, Ludwik S. Cygan, Carlos A. Escobar Marin, Joseph Jacobs
  • Publication number: 20220027231
    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.
    Type: Application
    Filed: October 5, 2021
    Publication date: January 27, 2022
    Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P Mann, Frederick Joseph Jacobs
  • Patent number: 11169870
    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: November 9, 2021
    Assignee: VMware, Inc.
    Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
  • Publication number: 20210216394
    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 15, 2021
    Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs