Patents by Inventor Joseph A. Murray

Joseph A. Murray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6567871
    Abstract: A method and apparatus is described that is related to repeating (extending) transactions on a bus. A plurality of buffer pairs are configured to direct a plurality of signals between a first bus and a second bus in a bus cycle. A circuit is configured to monitor a control signal to determine a bus location of a master device and the circuit is further configured to enable one buffer in the buffer pairs to control a direction of the plurality of signals between the first bus and the second bus.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: May 20, 2003
    Assignee: Intel Corporation
    Inventors: Lee K. Koh, Joseph Murray
  • Publication number: 20020188794
    Abstract: A method and apparatus is described that is related to repeating (extending) transactions on a bus. A plurality of buffer pairs are configured to direct a plurality of signals between a first bus and a second bus in a bus cycle. A circuit is configured to monitor a control signal to determine a bus location of a master device and the circuit is further configured to enable one buffer in the buffer pairs to control a direction of the plurality of signals between the first bus and the second bus.
    Type: Application
    Filed: July 26, 1999
    Publication date: December 12, 2002
    Inventors: LEE K. KOH, JOSEPH MURRAY
  • Publication number: 20020168664
    Abstract: There is a pressing need for computer-implemented tools that can summarize and present the enormous amounts of public literature to facilitate analysis of gene expression data. The present invention provides techniques and systems for efficiently integrating public literature regarding gene function with data from gene expression profiling experiments. Information from literature databases relating to a particular set of DNA sequences of known expression pattern is retrieved, processed, cross-referenced and viewed to provide further information about a particular DNA sequence to facilitate its identification as a candidate gene.
    Type: Application
    Filed: March 4, 2002
    Publication date: November 14, 2002
    Inventors: Joseph Murray, Donna Hendrix, Daniel J. Chin
  • Publication number: 20020011531
    Abstract: A liquid sprayer is provided. This liquid sprayer includes a bottle having an opening and a sprayer housing attached to the bottle. This sprayer housing includes an electrical motor, a voltage source for powering the electrical motor, a pump driven by the motor, a switch for completing an electrical circuit, a nozzle mechanism attached to the sprayer housing for spraying a liquid. The liquid sprayer also includes a deformable “pinched tube” mechanism which prevents liquid from flowing through the nozzle when the sprayer is not being used. The sprayer housing also includes a trigger movably connected to the sprayer housing for closing the switch, translating the piston and creating a leak-tight seal by squeezing the “pinched tube”.
    Type: Application
    Filed: July 23, 2001
    Publication date: January 31, 2002
    Applicant: The Procter & Gamble Company
    Inventors: Phillip Joseph DiMaggio, Robert James Good, Joseph Rae Krestine, Michael Joseph Murray, Alen David Streutker
  • Publication number: 20010043098
    Abstract: Symmetrical cross coupled PLL circuits provide pseudo-synchronization between two independent clock signals, especially for use in fault tolerant applications. Independent oscillators provide input signals to each of the PLL circuits. The PLL circuits include divide circuitry that provide output signals at some sub multiple of the input clock signals. The phase relationship between the output clock signals from the cross coupled PLL circuits is monitored by phase detector circuits. If the phase of one output clock signal is determined to be advanced relative to the other output clock signal, the phase of that output clock signal is retarded by temporarily increasing the divide ratio of the PLL circuit producing the phase advanced signal.
    Type: Application
    Filed: July 23, 2001
    Publication date: November 22, 2001
    Inventors: Kevin Wayne Locker, Joseph Murray
  • Patent number: 6297702
    Abstract: Symmetrical cross coupled PLL circuits provide pseudo-synchronization between two independent clock signals, especially for use in fault tolerant applications. Independent oscillators provide input signals to each of the PLL circuits. The PLL circuits include divide circuitry that provide output signals at some sub multiple of the input clock signals. The phase relationship between the output clock signals from the cross coupled PLL circuits is monitored by phase detector circuits. If the phase of one output clock signal is determined to be advanced relative to the other output clock signal, the phase of that output clock signal is retarded by temporarily increasing the divide ratio of the PLL circuit producing the phase advanced signal.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: October 2, 2001
    Assignee: Honeywell International Inc.
    Inventors: Kevin Wayne Locker, Joseph Murray
  • Patent number: 6111079
    Abstract: Metal binding polypeptides which include an amino acid sequence coding for a light chain variable region of a monoclonal antibody capable of immunoreacting with a lead cation and nucleotides which include a nucleic acid sequence coding for the variable region are provided. The invention is also directed to fusion proteins and Fab fragments which include the light chain variable region.
    Type: Grant
    Filed: December 4, 1996
    Date of Patent: August 29, 2000
    Assignee: Bionebraska, Inc.
    Inventors: Dwane E. Wylie, Osvaldo Lopez, Peter Joseph Murray, Peter Goebel
  • Patent number: 6105828
    Abstract: A dropper tip which is adapted to be connected to a container for dispensing fluid, such as medications and like, from the container includes a body having first and second opposite ends and an inner wall defining a conduit therethrough. The inner wall smoothly diverges and gradually increases in inner diameter from the first end to the second end such that air bubbles are prevented from being permanently trapped along the inner wall. The inner wall is highly polished and may be made of olefinic material, silicone rubber material, or fluorocarbon, including, but not limited to, polytetrafluoroethylene (PTFE), carbon tetrafluoroethylene (CTFE), fluoroethylene propylene (FEP) or the like, to resist fluid wetting, facilitate fluid detachment therefrom and to reduce fluid film thickness therealong. The surface of the inner wall is smoothed to minimize surface roughness.
    Type: Grant
    Filed: April 22, 1998
    Date of Patent: August 22, 2000
    Assignees: Atrion Medical Products, Inc., Baush and Lomb Pharmaceuticals, Inc.
    Inventors: Rowland W. Kanner, Paul Wesley Lombard, Joseph Murray Ault, Jr.
  • Patent number: 6070182
    Abstract: An application accelerator unit (AAU) that is integrated as part of a data processor, such as an I/O processor (IOP) integrated circuit. In one embodiment, the AAU includes logic for improving the performance of storage applications such as Redundant Array of Inexpensive Disks (RAID). The AAU performs boolean operations such as exclusive-or (XOR) on multiple blocks of data to form the image parity block which is then written to the redundant disk array. Additionally, the AAU may feature adder logic configured to perform an addition such as a network header checksum calculation on each data packet. The AAU includes a memory-mapped programming interface that allows software executed by a core processor in the IOP to utilize the AAU for accelerating storage and networking applications as well as for local memory DMA-type transfers, using the chain descriptor construct.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: May 30, 2000
    Assignee: Intel Corporation
    Inventors: Ravi S. Rao, Byron R. Gillespie, Elliot Garbus, Joseph Murray
  • Patent number: 6067629
    Abstract: A transmit circuit operable to synchronize a data transmission is disclosed. The transmit circuit comprises a first circuit configured to transmit a plurality of data segments. The transmit circuit further comprises a second circuit coupled to the first circuit. The second circuit is configured to generate a strobe signal indicating the transmission of a first data segment of the plurality of data segments. The transmit circuit also comprises a third circuit coupled to the second circuit. The third component is configured to receive an acknowledge signal. Based on a logic transition of the acknowledge signal, the third circuit determines the transmission of a second data segment of the plurality of data segments.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: May 23, 2000
    Assignee: Intel Corporation
    Inventors: Joseph Murray, Jeff J. McCoskey, Nick G. Eskandari
  • Patent number: 5987617
    Abstract: An apparatus and method of reducing power consumption in an integrated device having a first module with a mandatory operating frequency and a second module with a flexible frequency requirement. The integrated device is powered by a serial bus. The first module is segregated from the second module in the time domain by a frequency independent interface. The second module is then operated at a lower frequency when power conservation is needed. The operating frequency of the second module can be dynamically changed to improve performance of the second module when a power budget for the device permits.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 16, 1999
    Assignee: Intel Corporation
    Inventors: King-Seng Hu, Lay Leng Cheok, Vui Yong Liew, Joseph Murray, Bruce Moore, Joseph Gaubatz
  • Patent number: 5808090
    Abstract: A process for preventing precipitation of cimetidine from cimetidine injectables which involves thermally treating the cimetidine injectables, which are substantially free of precipitate, is described.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: September 15, 1998
    Assignee: Endo Pharmaceuticals Inc.
    Inventor: Joseph Murray Ault, Jr.
  • Patent number: 5802776
    Abstract: There is disclosed a gutter trap assemblage which is adapted for use with conventional, U-shaped gutters and their downspouts. The gutter trap assemblage is an integral, one piece unit having an upper section and a lower section. When installed, the upper section mates with and communicates with a conventional U-shaped gutter and the lower section communicates with a conventional gutter downspout. The upper section also communicates with the lower section through its open bottom which is co-extensive with the open top of the lower section. A plurality of screens are provided in the lower section to form a series of chambers therein. The screens are positioned so that their top edges are below the plane of the bottom wall of a conventional, U-shaped gutter.
    Type: Grant
    Filed: April 1, 1997
    Date of Patent: September 8, 1998
    Inventor: Joseph A. Murray
  • Patent number: 5537572
    Abstract: A cache memory controller and method for dumping the contents of a cache directory and a cache data random access memory (RAM) are described. In order to dump the contents of the cache directory, access to the cache data RAM is disabled by disabling the cache controller. Then, address tags within the cache directory are read sequentially from a reserved register. In order to dump the contents of the cache data RAM, new addresses are allocated to data in the cache data RAM. This is done, for example, by blocking writes to the cache data RAM while enabling read access from the cache data RAM and both read and write access to the cache directory. A reserved block of cacheable memory within, for example, the main system memory, is accessed. When the reserved block of cacheable memory is accessed, address tags for addresses of the reserved block of cacheable memory are written into the cache directory; however, data from the reserved block of cacheable memory is not written into the cache data RAM.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: July 16, 1996
    Assignee: VLSI Technology, Inc.
    Inventors: Jeff M. Michelsen, Joseph Murray
  • Patent number: 5448704
    Abstract: A PCI bus writes non-contiguous data in a maximum of two PCI bus write cycles. A Bridge is provided which can combine data within its write buffer such that non-contiguous data results. Some I/O devices on the PCI bus cannot handle non-contiguous data, so the Bridge detects non-contiguous data, and generates appropriate write cycles to the PCI bus to transfer this data in a contiguous fashion. The method described takes advantage of the multiple data phase capability of the PCI bus to transfer data at more than one address during one PCI bus write cycle, and optimizes these transfers to assure that all non-contiguous transfers can occur in only two PCI bus write cycles.
    Type: Grant
    Filed: March 7, 1994
    Date of Patent: September 5, 1995
    Assignee: VLSI Technology, Inc.
    Inventors: David G. Spaniol, Joseph Murray
  • Patent number: 5421631
    Abstract: There is disclosed a pail bailer having a continuous wall, an open top and a bottom that has a flood port formed therein and which is fitted with a flood screen and an internal flexible flapper valve overlying the flood port. The flapper valve is provided with a spacer bushing that permit it to flex away from the flood port when the pail bailer is lowered into water or other liquid to permit the water or other liquid to enter and fill the pail bailer. A handle is provided across the open top of the pail bailer and its ends are secured in diametrically opposed brackets enabling the handle to be rotated through an arc greater than 180.degree. or be locked within the brackets in vertical, coaxial alignment with the longitudinal axis of the pail bailer.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: June 6, 1995
    Inventor: Joseph A. Murray
  • Patent number: 5365130
    Abstract: An output pad for an integrated circuit includes circuitry to align the output with an on-chip clock signal, and to compensate the output such that it remains coincident with the on-chip clock signal even when changes occur in power supply voltage, manufacturing process and temperature. This output pad has a closed-loop feedback circuit which controls the delay of the output signal through a variable delay element. The loop adjust the delay until the clock edge of the on-chip clock signal is coincident with the output signal within a defined tolerance. The output pad self-compensates with every clock cycle, which is many times faster than any induced variation.
    Type: Grant
    Filed: August 7, 1992
    Date of Patent: November 15, 1994
    Assignee: VLSI Technology, Inc.
    Inventors: Joseph Murray, Ned D. Garinger, Peter H. Sorrells
  • Patent number: 5289702
    Abstract: The disclosure is of washing machine apparatus including a ring, within the clothes basket, and imbalance indicators coupled thereto and adapted to provide a visual indication to an operator when an imbalance occurs and provides problems in the spin cycles. The indicators show the operator where the imbalance is located and it can be easily corrected.
    Type: Grant
    Filed: January 6, 1993
    Date of Patent: March 1, 1994
    Inventor: Joseph A. Murray
  • Patent number: 5282547
    Abstract: A splashguard device for a dishwasher includes an angular sector of a circular plate. A sector angle of the angular sector has an angle of from about 100 to 130 degrees. The radius of the circular plate substantially equals the radial length of a dishwasher door determined from the hinge axis of the dishwasher door. A plurality of fastening devices permanently secures the angular sector at a radially extending edge to a radially directed side face of the dishwasher door. Spacer devices are provided for spacing the angular sector at a distance of approximately 0.5 inch from the radially extending side face of the dishwasher door in a vertical plane parallel to an outer face of a dishwasher outside wall. A guide is attached to the dishwasher outside wall to ensure a free movement of the splashguard.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: February 1, 1994
    Inventor: Joseph A. Murray
  • Patent number: D420936
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: February 22, 2000
    Assignee: Findings, Inc.
    Inventor: Joseph Murray