Patents by Inventor Joseph A. Panarello

Joseph A. Panarello has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4064396
    Abstract: The disclosed linearization system and process converts a high resolution non-linear analog input signal, representative of the thickness of an object, into a high resolution linear analog output signal suitable for use in driving a variety of output devices. The system requires only a small amount of memory for storing pre-calculated non-linear correction coefficients. Prior art linearization systems typically require large memory configurations and/or powerful computers to develop the output signal from the non-linear input. The known systems do not take advantage of the high resolution inherent in the input signal. The disclosed system "channels" the input signal to separate circuit paths so that it may be used directly to; (1) locate an appropriate correction coefficient; (2) develop a correction term after an appropriate correction coefficient is located; and (3) develop a linearized signal having the same high resolution inherent in the input signal.
    Type: Grant
    Filed: December 13, 1976
    Date of Patent: December 20, 1977
    Assignee: Sangamo Weston, Inc.
    Inventor: Joseph A. Panarello