Patents by Inventor Joseph A. Reynick

Joseph A. Reynick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit early life failure detection by monitoring changes in current signatures
    Patent number: 6873171
    Abstract: A method for testing integrated circuits, including measuring a current signature delta value of a device under test and comparing the current signature delta value to a threshold current signature delta value to determine whether the current signature delta value is greater than the threshold current signature delta value. If the current signature delta value exceeds the threshold current signature delta value, the integrated circuit is rejected. Integrated circuits are also rejected if the post-stress current signature value exceeds a maximum current signature value, even though the current signature delta value is less than the threshold current signature delta value. In addition, an apparatus for testing integrated circuits is disclosed.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: March 29, 2005
    Assignee: Agere Systems Inc.
    Inventor: Joseph A. Reynick
  • Integrated circuit early life failure detection by monitoring changes in current signatures
    Publication number: 20040160239
    Abstract: A method for testing integrated circuits, including measuring a current signature delta value of a device under test and comparing the current signature delta value to a threshold current signature delta value to determine whether the current signature delta value is greater than the threshold current signature delta value. If the current signature delta value exceeds the threshold current signature delta value, the integrated circuit is rejected. Integrated circuits are also rejected if the post-stress current signature value exceeds a maximum current signature value, even though the current signature delta value is less than the threshold current signature delta value. In addition, an apparatus for testing integrated circuits is disclosed.
    Type: Application
    Filed: February 12, 2004
    Publication date: August 19, 2004
    Inventor: Joseph A. Reynick
  • Integrated circuit early life failure detection by monitoring changes in current signatures
    Patent number: 6714032
    Abstract: A method for testing integrated circuits, including measuring a current signature delta value of a device under test and comparing the current signature delta value to a threshold current signature delta value to determine whether the current signature delta value is greater than the threshold current signature delta value. If the current signature delta value exceeds the threshold current signature delta value, the integrated circuit is rejected. Integrated circuits are also rejected if the post-stress current signature value exceeds a maximum current signature value, even though the current signature delta value is less than the threshold current signature delta value. In addition, an apparatus for testing integrated circuits is disclosed.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: March 30, 2004
    Assignee: Agere System Inc.
    Inventor: Joseph A. Reynick