Abstract: System for displaying computer generated information on a display screen such as a standard television raster by mapping memory bits onto corresponding points of the raster. The information is applied serially to the television circuits in synchronization with the sweep rate of the television. Horizontal and vertical synchronization signals are also generated to control the receiver sweep circuits.

Abstract: Method and circuit for controlling the color of dot elements in a raster scan display having a data memory for storing the state (on or off) of dot elements which are mapped onto the raster scan display and a smaller auxiliary memory for storing color information. The color information stored in a location of the auxiliary memory specifies the color of a plurality of contiguous dot elements so that the auxiliary memory can be much smaller than the data memory. The contiguous dot elements whose color is specified by a location in the auxiliary memory form a block which can be arranged so that the address bits to the auxiliary memory form a proper subset of the address bits to the data memory.

Abstract: Register-oriented, parallel-organized microprocessor architecture having a register matrix for storage of memory addresses used to address external devices and instruction operands, having working registers for identifying a desired register from the matrix for a given operation, and having two buses for the distribution of data and addresses. Means are provided for operating on the contents of the registers comprising the register matrix when used as instruction operands to permit operations on frequently-used data at a speed not limited by external access requirements.