Abstract: In an example method of trimming a voltage reference circuit, the method includes: setting the circuit to a first temperature; trimming a first resistor (RDEGEN) of a differential amplifier stage of the circuit; and trimming a first resistor (R1) of a scaling amplifier stage of the circuit. The trimming equalizes current flow through the differential amplifier stage and the scaling amplifier stage. The method includes: trimming a second resistor (R2) of the scaling amplifier stage to set an output voltage of the circuit to a target voltage at the first temperature; setting the circuit to a second temperature; and trimming a second resistor (RPTAT) of the differential amplifier stage, a third resistor (R1PTAT) of the scaling amplifier stage, and a fourth resistor (R2PTAT) of the scaling amplifier stage to set the output voltage of the circuit to the target voltage at the second temperature.

Abstract: An amplifier includes a first stage and a second stage. The first stage includes a first output, and a second output. The second stage includes a first transistor, a second transistor, and a common-mode circuit. The first transistor includes a drain coupled to the first output of the first stage. The second transistor includes a drain coupled to the second output of the first stage. The common-mode circuit includes a reversible current mirror circuit coupled to the drain of the first transistor and the drain of the second transistor.

Abstract: In an example method of trimming a voltage reference circuit, the method includes: setting the circuit to a first temperature; trimming a first resistor (RDEGEN) of a differential amplifier stage of the circuit; and trimming a first resistor (R1) of a scaling amplifier stage of the circuit. The trimming equalizes current flow through the differential amplifier stage and the scaling amplifier stage. The method includes: trimming a second resistor (R2) of the scaling amplifier stage to set an output voltage of the circuit to a target voltage at the first temperature; setting the circuit to a second temperature; and trimming a second resistor (RPTAT) of the differential amplifier stage, a third resistor (R1PTAT) of the scaling amplifier stage, and a fourth resistor (R2PTAT) of the scaling amplifier stage to set the output voltage of the circuit to the target voltage at the second temperature.

Abstract: A system includes a battery. The system also includes a low dropout regulator (LDO) circuit with an input coupled to the battery and the LDO circuit. The system also includes a load coupled to an output of the LDO circuit. The LDO circuit includes an error amplifier and a control circuit coupled to the error amplifier. The LDO circuit also includes a first pass transistor coupled to the control circuit and configured to provide a first pass current as a function of load current according to a first continuous conduction curve. The LDO circuit also includes a second pass transistor coupled to the control circuit and configured to provide a second pass current as a function of load current according to a second continuous conduction curve.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit comprises a first amplifier, a voltage divider, a first resistor, and a transistor. The first amplifier comprises a first input terminal configured to receive a first voltage signal, a second input terminal coupled to a first node, and an output terminal. The voltage divider is coupled between a second node and a ground node and having the first node as an output node of the voltage divider. The first resistor is coupled at a first end to the second node. The transistor comprises a gate terminal coupled to the output terminal of the first amplifier, the transistor being coupled between an input voltage node and a second end of the first resistor.

Abstract: A system includes an input voltage source, a linear regulator coupled to the input voltage source, and a load coupled to an output of the linear regulator. The linear regulator includes an error amplifier coupled to a control terminal of a switch; and a control circuit coupled to the error amplifier and configured to provide a reference voltage to the error amplifier. The control circuit includes a mode selection circuit with a slow loop configured to sample a load current and with a fast loop configured to detect an output voltage error signal. The mode selection circuit is configured to adjust a mode of the control circuit between a continuous power mode and a duty cycle power save mode based on the sampled load current and the output voltage error signal.

Abstract: An electronic circuit includes a first transistor, a second transistor, and a variable resistor. The first transistor has a first threshold voltage. The second transistor has a second threshold voltage that is different from the first threshold voltage. The second transistor is coupled to the first transistor. The variable resistor is coupled to the first transistor and the second transistor. The variable resistor is configured to adjust a temperature coefficient of the electronic circuit. The electronic circuit is configured to generate a reference voltage based on a difference of the first threshold voltage and the second threshold voltage.

Abstract: An electronic circuit includes a first transistor, a second transistor, and a variable resistor. The first transistor has a first threshold voltage. The second transistor has a second threshold voltage that is different from the first threshold voltage. The second transistor is coupled to the first transistor. The variable resistor is coupled to the first transistor and the second transistor. The variable resistor is configured to adjust a temperature coefficient of the electronic circuit. The electronic circuit is configured to generate a reference voltage based on a difference of the first threshold voltage and the second threshold voltage.

Abstract: A system includes an input voltage source, a linear regulator coupled to the input voltage source, and a load coupled to an output of the linear regulator. The linear regulator includes an error amplifier coupled to a control terminal of a switch; and a control circuit coupled to the error amplifier and configured to provide a reference voltage to the error amplifier. The control circuit includes a mode selection circuit with a slow loop configured to sample a load current and with a fast loop configured to detect an output voltage error signal. The mode selection circuit is configured to adjust a mode of the control circuit between a continuous power mode and a duty cycle power save mode based on the sampled load current and the output voltage error signal.

Abstract: A system includes a battery. The system also includes a low dropout regulator (LDO) circuit with an input coupled to the battery and the LDO circuit. The system also includes a load coupled to an output of the LDO circuit. The LDO circuit includes an error amplifier and a control circuit coupled to the error amplifier. The LDO circuit also includes a first pass transistor coupled to the control circuit and configured to provide a first pass current as a function of load current according to a first continuous conduction curve. The LDO circuit also includes a second pass transistor coupled to the control circuit and configured to provide a second pass current as a function of load current according to a second continuous conduction curve.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit comprises a first amplifier, a voltage divider, a first resistor, and a transistor. The first amplifier comprises a first input terminal configured to receive a first voltage signal, a second input terminal coupled to a first node, and an output terminal. The voltage divider is coupled between a second node and a ground node and having the first node as an output node of the voltage divider. The first resistor is coupled at a first end to the second node. The transistor comprises a gate terminal coupled to the output terminal of the first amplifier, the transistor being coupled between an input voltage node and a second end of the first resistor.