Patents by Inventor Joseph Andrew Yedinak
Joseph Andrew Yedinak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230223474Abstract: A semiconductor device includes a region of semiconductor material of a first conductivity type. A body region of a second conductivity type is in the region of semiconductor material. The body region includes a first segment with a first peak dopant concentration, and a second segment laterally adjacent to the first segment with a second peak dopant concentration. A source region of the first conductivity type is in the first segment but not in at least part of the second segment. An insulated gate electrode adjoins the first segment and is configured to provide a first channel region in the first segment, adjoins the second segment and is configured to provide a second channel region in the second segment, and adjoins the source region. During a linear mode of operation, current flows first in the second segment but not in the first segment to reduce the likelihood of thermal runaway.Type: ApplicationFiled: March 22, 2023Publication date: July 13, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli WU, Joseph Andrew YEDINAK
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Publication number: 20230187546Abstract: In an aspect, an electronic device can include a substrate, a semiconductor layer overlying the substrate and including a mesa adjacent to a trench, and a doped region within the semiconductor layer. The doped region extends across an entire width of the mesa and contacts the lowermost point of the trench. A charge pocket can be located between an elevation of the peak concentration of the doped region and an elevation of the upper surface of the substrate. In another aspect, a process includes patterning a semiconductor layer to define a trench, forming a sacrificial layer within the trench, removing the sacrificial layer from a bottom of the trench, doping a portion of the semiconductor layer that is along the bottom of the trench while a remaining portion of the sacrificial layer is along a sidewall of the trench.Type: ApplicationFiled: December 9, 2021Publication date: June 15, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Joseph Andrew Yedinak
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Patent number: 11637201Abstract: A semiconductor device includes a region of semiconductor material of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is in the region of semiconductor material. The body region includes a stripe region; a first segment in the stripe region and having a first peak dopant concentration, a first depth into the region of semiconductor material, and a first length along the first major surface; and a second segment in the stripe region laterally adjacent to the first segment, adjacent to the first major surface, and having a second peak dopant concentration, a second depth into the region of semiconductor material, and a second length along the first major surface. A source region of the first conductivity type is in the first segment but not in at least part of the second segment.Type: GrantFiled: November 23, 2021Date of Patent: April 25, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli Wu, Joseph Andrew Yedinak
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Publication number: 20220407411Abstract: In some aspects, the techniques described herein relate to a circuit including: a metal-oxide semiconductor field-effect transistor (MOSFET) including a gate, a source, and a drain; and a snubber circuit coupled between the drain and the source, the snubber circuit including: a diode having a cathode and an anode, the cathode being coupled with the drain; a capacitor having a first terminal coupled with the anode, and a second terminal coupled with the source; and a resistor having a first terminal coupled with the anode and the first terminal of the capacitor, and a second terminal coupled with the source.Type: ApplicationFiled: June 13, 2022Publication date: December 22, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Dean E. PROBST, Joseph Andrew YEDINAK, Balaji PADMANABHAN, Peter A. BURKE, Jeffery A. NEULS, Ashok CHALLA
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Publication number: 20220254889Abstract: An electronic device can include a substrate, an active region of a transistor, and a shield electrode. The substrate can define a trench and include a mesa adjacent to the trench, and the shield electrode can be within the trench. In an embodiment, the electronic device can further include an active region of a transistor within the mesa and an insulating layer including a thicker section and a thinner section closer to a bottom of the trench. In another embodiment, the electronic device can include a body region and a doped region within the mesa and spaced apart from the body region by a semiconductor region. The doped region can have a dopant concentration that is higher than a dopant concentration of the semiconductor region and a portion of the substrate underlying the doped region.Type: ApplicationFiled: April 26, 2022Publication date: August 11, 2022Applicant: Semiconductor Components Industries, LLCInventors: Zia Hossain, Joseph Andrew Yedinak, Sauvik Chowdhury, Muh-Ling Ger
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Publication number: 20220181480Abstract: In a general aspect, a semiconductor device can include a semiconductor substrate, a trench formed in the semiconductor substrate and a first dielectric layer lining the trench. The semiconductor device can further include a first semiconductor material disposed in a lower portion of the trench. The first dielectric layer being can be disposed between the semiconductor substrate and the first semiconductor material. The semiconductor device can also include a second dielectric layer disposed on the first semiconductor material and a second semiconductor material disposed in an upper portion of the trench. The first dielectric layer can be disposed between the semiconductor substrate and the second semiconductor material. The second dielectric layer can be disposed between the first semiconductor material and the second semiconductor material. The semiconductor device can also include at least one of a diode or a resistor defined in the second semiconductor material.Type: ApplicationFiled: November 30, 2021Publication date: June 9, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Joseph Andrew YEDINAK
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Patent number: 11342424Abstract: An electronic device can include a substrate, an active region of a transistor, and a shield electrode. The substrate can define a trench and include a mesa adjacent to the trench, and the shield electrode can be within the trench. In an embodiment, the electronic device can further include an active region of a transistor within the mesa and an insulating layer including a thicker section and a thinner section closer to a bottom of the trench. In another embodiment, the electronic device can include a body region and a doped region within the mesa and spaced apart from the body region by a semiconductor region. The doped region can have a dopant concentration that is higher than a dopant concentration of the semiconductor region and a portion of the substrate underlying the doped region.Type: GrantFiled: April 13, 2020Date of Patent: May 24, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Zia Hossain, Joseph Andrew Yedinak, Sauvik Chowdhury, Muh-Ling Ger
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Publication number: 20220085213Abstract: A semiconductor device includes a region of semiconductor material of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is in the region of semiconductor material. The body region includes a stripe region; a first segment in the stripe region and having a first peak dopant concentration, a first depth into the region of semiconductor material, and a first length along the first major surface; and a second segment in the stripe region laterally adjacent to the first segment, adjacent to the first major surface, and having a second peak dopant concentration, a second depth into the region of semiconductor material, and a second length along the first major surface. A source region of the first conductivity type is in the first segment but not in at least part of the second segment.Type: ApplicationFiled: November 23, 2021Publication date: March 17, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli WU, Joseph Andrew YEDINAK
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Patent number: 11222976Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region.Type: GrantFiled: August 7, 2020Date of Patent: January 11, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli Wu, Joseph Andrew Yedinak
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Publication number: 20210320178Abstract: An electronic device can include a substrate, an active region of a transistor, and a shield electrode. The substrate can define a trench and include a mesa adjacent to the trench, and the shield electrode can be within the trench. In an embodiment, the electronic device can further include an active region of a transistor within the mesa and an insulating layer including a thicker section and a thinner section closer to a bottom of the trench. In another embodiment, the electronic device can include a body region and a doped region within the mesa and spaced apart from the body region by a semiconductor region. The doped region can have a dopant concentration that is higher than a dopant concentration of the semiconductor region and a portion of the substrate underlying the doped region.Type: ApplicationFiled: April 13, 2020Publication date: October 14, 2021Applicant: Semiconductor Components Industries, LLCInventors: Zia Hossain, Joseph Andrew Yedinak, Sauvik Chowdhury, Muh-Ling Ger
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Publication number: 20200365730Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region.Type: ApplicationFiled: August 7, 2020Publication date: November 19, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli Wu, Joseph Andrew YEDINAK
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Patent number: 10784373Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region.Type: GrantFiled: July 18, 2019Date of Patent: September 22, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli Wu, Joseph Andrew Yedinak
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Publication number: 20200295189Abstract: A semiconductor device includes a region of semiconductor material comprising a semiconductor layer of a first conductivity type and having a first major surface. A body region of a second conductivity type opposite to the first conductivity type is disposed in the second semiconductor layer extending from the first major surface. The body region comprises a first segment having a first doping concentration, and a second segment laterally adjacent to the first segment and adjacent to the first major surface having a second doping concentration less than the first doping concentration. A source region of the first conductivity type is disposed in the first segment but is not disposed in at least a portion of the second segment. An insulated gate electrode is disposed adjacent to the region of semiconductor material adjoining the first segment, the second segment, and the source region. A conductive layer is electrically connected to the first segment, the second segment, and the first source region.Type: ApplicationFiled: July 18, 2019Publication date: September 17, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Xiaoli Wu, Joseph Andrew YEDINAK
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Publication number: 20130087852Abstract: Edge termination structures for power semiconductor devices and methods for making such structures are described. The power semiconductor devices (or power devices) contain a substrate with an epitaxial layer thereon, an array of substantially-parallel, active trenches formed in the epitaxial layer, with the active trenches containing a transistor structure with an insulated gate conducting layer, a superjunction or shielded region adjacent the active trenches; a peripheral trench surrounding the active trenches, and a source contact area within an upper surface of the epitaxial layer, where the gate conducting layer extends over the superjunction or shielded region and over the surrounding peripheral trench. Such a configuration allows the edge termination structure to be used with a wide range of breakdown voltages in power MOSFET devices containing PN superjunction structures. Other embodiments are described.Type: ApplicationFiled: October 6, 2011Publication date: April 11, 2013Inventors: Suku Kim, Joseph Andrew Yedinak, Ihsiu Ho
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Patent number: 7582519Abstract: A semiconductor structure is formed as follows. A semiconductor region is formed to have a P-type region and a N-type region forming a PN junction therebetween. A first trench is formed extending in the semiconductor region adjacent at least one of the P-type and N-type regions is formed. At least one diode is formed in the trench.Type: GrantFiled: July 14, 2006Date of Patent: September 1, 2009Assignee: Fairchild Semiconductor CorporationInventors: Christopher Boguslaw Kocon, Joseph Andrew Yedinak
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Patent number: 7132712Abstract: In accordance with an embodiment of the invention, a semiconductor structure includes a semiconductor region having a P-type region and a N-type region forming a PN junction therebetween. A first trench extends in the semiconductor region adjacent at least one of the P-type and N-type regions. The first trench includes at least one diode therein.Type: GrantFiled: November 5, 2002Date of Patent: November 7, 2006Assignee: Fairchild Semiconductor CorporationInventors: Christopher Boguslaw Kocon, Joseph Andrew Yedinak
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Publication number: 20040084721Abstract: In accordance with an embodiment of the invention, a semiconductor structure includes a semiconductor region having a P-type region and a N-type region forming a PN junction therebetween. A first trench extends in the semiconductor region adjacent at least one of the P-type and N-type regions. The first trench includes at least one diode therein.Type: ApplicationFiled: November 5, 2002Publication date: May 6, 2004Applicant: Fairchild Semiconductor CorporationInventors: Christopher Boguslaw Kocon, Joseph Andrew Yedinak
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Patent number: 5872028Abstract: A method of manufacturing a semiconductor device and device in which a sacrificial N shelf layer is grown on a P+ semiconductor substrate to contain the out-diffusion of dopant from the substrate. An N+ buffer layer is grown on the N shelf layer and an N- epitaxial layer is grown on the N+ buffer layer. The presence of the N shelf layer, which is consumed by the substrate dopant during further device fabrication, allows the integrated dopant level of the N+ buffer layer to be accurately controlled in the finished device.Type: GrantFiled: September 5, 1996Date of Patent: February 16, 1999Assignee: Harris CorporationInventors: Joseph Andrew Yedinak, Anup Bhalla, Jeffrey Allen Webster, Joseph Leonard Cumbo