Patents by Inventor Joseph Bradford BRANNON

Joseph Bradford BRANNON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10250194
    Abstract: An envelope tracking scheme can be used, such as to modulate a supply node of a power amplifier circuit to improve efficiency. For example, a magnitude or amplitude envelope of a signal to be modulated can be scaled and used to drive a node, such as a drain, of the power amplifier circuit. An envelope tracking signal can be generated such as having a bandwidth that is compressed as compared to a full-bandwidth envelope signal. A peak-value “look ahead” technique can be used, for example, so that amplitude compression or clipping of the transmit signal is suppressed when the bandwidth-compressed envelope tracking signal is used to modulate a supply node of the power amplifier used to amplify the transmit signal.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: April 2, 2019
    Assignee: Analog Devices Global
    Inventors: Patrick Pratt, Joseph Bradford Brannon, Ronald Dale Turner
  • Publication number: 20170141736
    Abstract: An envelope tracking scheme can be used, such as to modulate a supply node of a power amplifier circuit to improve efficiency. For example, a magnitude or amplitude envelope of a signal to be modulated can be scaled and used to drive a node, such as a drain, of the power amplifier circuit. An envelope tracking signal can be generated such as having a bandwidth that is compressed as compared to a full-bandwidth envelope signal. A peak-value “look ahead” technique can be used, for example, so that amplitude compression or clipping of the transmit signal is suppressed when the bandwidth-compressed envelope tracking signal is used to modulate a supply node of the power amplifier used to amplify the transmit signal.
    Type: Application
    Filed: March 30, 2016
    Publication date: May 18, 2017
    Inventors: Patrick Pratt, Joseph Bradford Brannon, Ronald Dale Turner
  • Patent number: 9184756
    Abstract: Embodiments of the present invention may provide a signal processing circuit that may comprises an analog-to-digital converter (ADC), and an output restriction circuit. The output restriction circuit may reduce the accuracy of the digital output of the ADC when signal content exceeds a pre-determined spectrum mask in an undesirable band. In one embodiment, the input signal spectrum may be actively monitored and when the input spectrum is inconsistent with an intended application, the output resolution may be restricted, for example, by truncating least significant bits (LSBs) of the digital output or adding digital noise.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: November 10, 2015
    Assignee: ANALOG DEVICES, INC.
    Inventors: Joseph Bradford Brannon, David Hall Robertson, James C. Camp, Carroll C. Speir
  • Publication number: 20120114077
    Abstract: Embodiments of the present invention may provide a signal processing circuit that may comprises an analog-to-digital converter (ADC), and an output restriction circuit. The output restriction circuit may reduce the accuracy of the digital output of the ADC when signal content exceeds a pre-determined spectrum mask in an undesirable band. In one embodiment, the input signal spectrum may be actively monitored and when the input spectrum is inconsistent with an intended application, the output resolution may be restricted, for example, by truncating least significant bits (LSBs) of the digital output or adding digital noise.
    Type: Application
    Filed: November 8, 2010
    Publication date: May 10, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Joseph Bradford BRANNON, David Hall Robertson, James C. Camp, Carroll C. Speir