Abstract: Video frame buffers are controlled using a sequence of new-frame-indicators (e.g., FLIP) and no-new-frame-indicators (e.g., NOFLIP) in a frame indicator queue that is accessed with each display refresh. Video samples are loaded into a chain of video frame buffers that is “rotated” during the vertical blanking signal of the display to swap an old frame buffer out for a new frame buffer. The rotations of the frame buffer chain are controlled based on the frame indicators in the frame indicator queue to present new video samples to the display in a regular pattern, thereby providing smooth video playback.

Abstract: Systems and methods for processing data from priority-based operating system threads within a realtime component are described. The component submits blank buffers to hardware. The component receives data from priority based operating system threads and processes and writes the data from within an independent second real-time thread to buffers before the buffers into which the data is written are used by the hardware. Hardware buffers are created offset from memory page boundaries such that the least significant bits of any memory address referencing the start of the buffer uniquely identify it and can be used as an index into a circular buffer queue to determine which buffer is currently being processed. Data is always processed and written into a buffer that is a predetermined range of buffers in front of the buffer currently being processed by the hardware.

Abstract: The present invention is directed to a method and system for minimizing memory access latency during realtime processing. The method includes a mechanism for marking information that will be accessed during realtime processing. The marked information may include code, data, heaps, stacks, as well as other information. The method includes support for locking down all of the marked information so that it is present in a computing machine's physical memory so that no page faults will be incurred during realtime processing. The method additionally enables realtime processing code to allocate and free memory in a non-blocking manner. It does so by enabling the creation of heaps for use during realtime processing, wherein each heap supports allocating and freeing memory in a non-blocking fashion. Each heap tracks freed memory blocks using individual non-blocking tracking lists for each memory block size supported by that heap.

Abstract: Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU resources to a thread. When it is time to allocate the CPU resources, the performance counter issues a maskable or non-maskable interrupt to an advanced programmable interrupt controller (APIC). The APIC then issues a maskable non-maskable interrupt to the CPU. In response to receiving the non-maskable interrupt, the CPU allocates resources to the thread. In addition, the disclosed methods and computer-executable components also: (a) allow scheduling of CPU resources such that real-time threads are guaranteed respective portions of time slots, (b) enable real-time scheduling on a non-real-time operating system, and (c) provide scheduling of CPU resources on a uni-processor machine such that at least first and second real-time threads dependent on one another are synchronized.

Abstract: A sample rate converter (SRC) is used to slave hardware devices to a master hardware device. A clock manager registers the time at each clock of each device, communicates with memory that stores the clock times, and reports correlations between each clock time and the time at a reference clock. The processing of a data stream can be slaved to one or more hardware devices. The processing of a wake up period can be slaved to the clock of the master hardware device by adjusting the wakeup period. Slaving of hardware devices to the master hardware device can also be accomplished by finding a correlation between the clock times in memory and the reference clock. Each correlation can be input into an SRC corresponding to each slave hardware device. Each SRC can then generate or consume a data stream at the actual rate of the corresponding slave hardware device.

Abstract: A user-interactive program assists a user in locating files on optical media discs such as CD-ROMs and DVDs to enhance file-transfer rates and program installation times in computers with a Constant Angular Velocity (CAV) optical media disc drive. In addition, an application program calculates an optimal location for files and/or directories on an optical media disc so that the files are located near the location with the highest data transfer rate. This program may be used to compute an image file that defines where data will be located on an optical disc, or may be used to control transfer of data to the optical media disc.

Abstract: Systems and methods to render tear free video in a multitasking operating environment are described. In one aspect, a video playback window portion of a desktop display is divided into non-overlapping first and second partitions. As video data is scanned into display memory which maps to the first and second partitions, current scan line input positions are monitored. Responsive to determining that the current scan line position is located in display memory associated with the second partition, display memory mapped to the second partition is not rendered and display memory mapped to the first partition is rendered into the video playback window.

Abstract: Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU resources to a thread. When it is time to allocate the CPU resources, the performance counter issues a maskable or non-maskable interrupt to an advanced programmable interrupt controller (APIC). The APIC then issues a maskable non-maskable interrupt to the CPU. In response to receiving the non-maskable interrupt, the CPU allocates resources to the thread. In addition, the disclosed methods and computer-executable components also: (a) allow scheduling of CPU resources such that real-time threads are guaranteed respective portions of time slots, (b) enable real-time scheduling on a non-real-time operating system, and (c) provide scheduling of CPU resources on a uni-processor machine such that at least first and second real-time threads dependent on one another are synchronized.

Abstract: Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU resources to a thread. When it is time to allocate the CPU resources, the performance counter issues a non-maskable interrupt to an advanced programmable interrupt controller (APIC). The APIC then issues a non-maskable interrupt to the CPU. In response to receiving the non-maskable interrupt, the CPU allocates resources to the thread.

Abstract: Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU resources to a thread. When it is time to allocate the CPU resources, the performance counter issues a maskable or non-maskable interrupt to an advanced programmable interrupt controller (APIC). The APIC then issues a maskable non-maskable interrupt to the CPU. In response to receiving the non-maskable interrupt, the CPU allocates resources to the thread. In addition, the disclosed methods and computer-executable components also: (a) allow scheduling of CPU resources such that real-time threads are guaranteed respective portions of time slots, (b) enable real-time scheduling on a non-real-time operating system, and (c) provide scheduling of CPU resources on a uni-processor machine such that at least first and second real-time threads dependent on one another are synchronized.

Abstract: A sample rate converter (SRC) is used to slave hardware devices to a master hardware device. A clock manager registers the time at each clock of each device, communicates with memory that stores the clock times, and reports correlations between each clock time and the time at a reference clock. The processing of a data stream can be slaved to one or more hardware devices. The processing of a wake up period can be slaved to the clock of the master hardware device by adjusting the wakeup period. Slaving of hardware devices to the master hardware device can also be accomplished by finding a correlation between the clock times in memory and the reference clock. Each correlation can be input into an SRC corresponding to each slave hardware device. Each SRC can then generate or consume a data stream at the actual rate of the corresponding slave hardware device.

Abstract: A user-interactive program assists a user in locating files on optical media discs such as CD-ROMs and DVDs to enhance file-transfer rates and program installation times in computers with a Constant Angular Velocity (CAV) optical media disc drive. In addition, an application program calculates an optimal location for files and/or directories on an optical media disc so that the files are located near the location with the highest data transfer rate. This program may be used to compute an image file that defines where data will be located on an optical disc, or may be used to control transfer of data to the optical media disc.

Abstract: A user-interactive program assists a user in locating files on optical media discs such as CD-ROMs and DVDs to enhance file-transfer rates and program installation times in computers with a Constant Angular Velocity (CAV) optical media disc drive. In addition, an application program calculates an optimal location for files and/or directories on an optical media disc so that the files are located near the location with the highest data transfer rate. This program may be used to compute an image file that defines where data will be located on an optical disc, or may be used to control transfer of data to the optical media disc.

Abstract: Systems and methods for processing data from priority-based operating system threads within a realtime component are described. The component submits blank buffers to hardware. The component receives data from priority based operating system threads and processes and writes the data from within an independent second real-time thread to buffers before the buffers into which the data is written are used by the hardware. Hardware buffers are created offset from memory page boundaries such that the least significant bits of any memory address referencing the start of the buffer uniquely identify it and can be used as an index into a circular buffer queue to determine which buffer is currently being processed. Data is always processed and written into a buffer that is a predetermined range of buffers in front of the buffer currently being processed by the hardware.