Patents by Inventor Joseph C. Barrett

Joseph C. Barrett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6867506
    Abstract: An apparatus for enclosing logic chips includes a substrate upon which a logic chip is mounted and a mold cap disposed upon the substrate and covering the logic chip. The mold cap includes at least one extension of sufficient size and shape to provide structural support to a corner section of the substrate.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: March 15, 2005
    Assignee: Intel Corporation
    Inventor: Joseph C. Barrett
  • Publication number: 20030183934
    Abstract: A semiconductor package is disclosed where the package includes a first die mounted to first surface of a second die. The first surface of the second die is then mounted to a substrate. The substrate includes a hole of appropriate size to receive the first die and to allow the second die to be mounted to the substrate using conventional interconnection and assembly techniques.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 2, 2003
    Inventor: Joseph C. Barrett
  • Patent number: 6605492
    Abstract: An apparatus for enclosing logic chips includes a substrate upon which a logic chip is mounted and a mold cap disposed upon the substrate and covering the logic chip. The mold cap includes at least one extension of sufficient size and shape to provide structural support to a corner section of the substrate.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: August 12, 2003
    Assignee: Intel Corporation
    Inventor: Joseph C. Barrett
  • Patent number: 6564452
    Abstract: A substrate for a plurality of electronic assemblies includes a strip of printed circuit board (PCB) material including a surface and a plurality of segments. Each segment is adapted to receive at least one electronic component and is arranged to be singulated into a plurality of individual electronic assemblies. Each segment has a perimeter portion located generally about the periphery of the segment, with the surface being covered with a solder mask, except for the perimeter portion.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: May 20, 2003
    Assignee: Intel Corporation
    Inventors: Joseph C. Barrett, Mark P. Jamieson
  • Patent number: 6545351
    Abstract: An integrated circuit package which includes an integrated circuit that is attached to a first side of a substrate. The package may also have a solder ball and a heat slug that are both attached to a second side of the substrate. The heat slug and solder ball can be attached to a printed circuit board. The heat slug can provide a thermal path from the substrate to the circuit board which has a relatively wide area. The wide area reduces the thermal impedance and the junction temperatures of the integrated circuit for a given amount of heat.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: April 8, 2003
    Assignee: Intel Corporation
    Inventors: Mark P. Jamieson, Joseph C. Barrett
  • Patent number: 6404067
    Abstract: An integrated circuit package including a substrate, an integrated circuit, and an encapsulant. The substrate has two opposing surfaces and an opening that extends between the two surfaces. The integrated circuit is mounted to the substrate substantially centered over the opening such that a portion of the opening is left uncovered by the integrated circuit. The encapsulant encapsulates the integrated circuit with a portion of the encapsulant extending between the two surfaces of the substrate and attached to the lower surface of the integrated circuit.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: June 11, 2002
    Assignee: Intel Corporation
    Inventors: Kuljeet Singh, Joseph C. Barrett
  • Publication number: 20020048845
    Abstract: An apparatus for enclosing logic chips includes a substrate upon which a logic chip is mounted and a mold cap disposed upon the substrate and covering the logic chip. The mold cap includes at least one extension of sufficient size and shape to provide structural support to a corner section of the substrate.
    Type: Application
    Filed: March 17, 2000
    Publication date: April 25, 2002
    Inventor: Joseph C Barrett
  • Publication number: 20020045294
    Abstract: A substrate for a plurality of electronic assemblies includes a strip of printed circuit board (PCB) material including a surface and a plurality of segments. Each segment is adapted to receive at least one electronic component and is arranged to be singulated into a plurality of individual electronic assemblies. Each segment has a perimeter portion located generally about the periphery of the segment, with the surface being covered with a solder mask, except for the perimeter portion.
    Type: Application
    Filed: September 14, 2001
    Publication date: April 18, 2002
    Inventors: Joseph C. Barrett, Mark P. Jamieson
  • Publication number: 20020001874
    Abstract: An apparatus for enclosing logic chips includes a substrate upon which a logic chip is mounted and a mold cap disposed upon the substrate and covering the logic chip. The mold cap includes at least one extension of sufficient size and shape to provide structural support to a comer section of the substrate.
    Type: Application
    Filed: August 2, 2001
    Publication date: January 3, 2002
    Inventor: Joseph C. Barrett
  • Patent number: 6310298
    Abstract: A substrate for a plurality of electronic assemblies includes a strip of printed circuit board (PCB) material including a surface and a plurality of segments. Each segment is adapted to receive at least one electronic component and is arranged to be singulated into a plurality of individual electronic assemblies. Each segment has a perimeter portion located generally about the periphery of the segment, with the surface being covered with a solder mask, except for the perimeter portion.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: October 30, 2001
    Assignee: Intel Corporation
    Inventors: Joseph C. Barrett, Mark P. Jamieson
  • Patent number: 6064117
    Abstract: An apparatus for enclosing logic chips includes a substrate upon which a logic chip is mounted and a mold cap disposed upon the substrate and covering the logic chip. The mold cap includes at least one extension of sufficient size and shape to provide structural support to a corner section of the substrate.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: May 16, 2000
    Assignee: Intel Corporation
    Inventor: Joseph C. Barrett
  • Patent number: 6060777
    Abstract: An integrated circuit package which includes an integrated circuit that is attached to a first side of a substrate. The package may also have a solder ball and a heat slug that are both attached to a second side of the substrate. The heat slug and solder ball can be attached to a printed circuit board. The heat slug can provide a thermal path from the substrate to the circuit board which has a relatively wide area. The wide area reduces the thermal impedance and the junction temperatures of the integrated circuit for a given amount of heat.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: May 9, 2000
    Assignee: Intel Corporation
    Inventors: Mark P. Jamieson, Joseph C. Barrett
  • Patent number: 5933324
    Abstract: An apparatus for dissipating heat transferred to a circuit board. A board on which to mount an electronic device includes a conductive layer. A first board heat dissipation element is thermally coupled to the conductive layer and extends away from a surface of the board to dissipate heat from the conductive layer to the ambient.
    Type: Grant
    Filed: December 16, 1997
    Date of Patent: August 3, 1999
    Assignee: Intel Corporation
    Inventor: Joseph C. Barrett
  • Patent number: 5810459
    Abstract: A stackable modular cabinet having modular, interlocking side units which allow cabinet dimensions to be tailored both vertically and laterally to user needs while also providing the strength and stability to support heavy equipment such as electronic subassemblies. Each side unit has a pair of mating flanges with apertures for receiving and retaining fastening pins that interlock to the fastening pins of a different side unit when the respective flanges of the two side units mate. The interlocked fastening pin structure forms unified rods which extend the full height of the cabinet and which cooperates with the intervening side unit flanges. Each side unit further has re-enforced, double-sided bracket structures at opposing ends which, in combination with the pin structure, provides an unusual amount of strength to the modular cabinet.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: September 22, 1998
    Assignee: Unisys Corporation
    Inventors: Joseph C. Barrett, Richard N. Svenson, Charles R. Weber, Richard S. McAuley