Abstract: A method for the fair and efficient transfer of variable length packets using fixed length “segments” utilizes a modified UTOPIA interface with three additional signals added, i.e. start of packet (SOP), end of packet (EOP), and most significant byte (MSB). Packets are broken into “segments” of fixed, but programmable, length. The start of a segment is marked by a pulse on the UTOPIA start of cell (SOC) signal line. The start of a packet is marked by a pulse on the SOP signal line. The end of a packet is marked by a pulse on the EOP signal line. According to a presently preferred embodiment, bytes are transferred via a 16-bit bus. When a packet ends with a single byte on the bus, the MSB signal line is asserted to distinguish it from a packet which ends with two bytes on the bus. The invention can be expanded to accommodate buses wider than 16-bits by making the EOP a multiple bit signal.

Abstract: Apparatus and methods for allocating shared memory utilizing linked lists are provided which are particularly useful in telecommunications applications such as ATM. A management RAM contained within a VLSI circuit is provided for controlling the flow of data into and out of a shared memory (data RAM), and stores information regarding a number of link lists and a free link list in the shared memory, and a block pointer to unused RAM locations. A head pointer, tail pointer, block counter and empty flag are stored for each data link list. The head and tail pointers each include a block pointer and a position counter. The block counter contains the number of blocks used in the particular queue. The empty flag indicates whether the queue is empty. The free link list includes a head pointer, a block counter, and an empty flag. Each memory page of the shared data RAM receiving the incoming data includes locations for storing data.

Abstract: An ATM destination switch includes an ATM layer device coupled to a physical layer device. The ATM layer device includes a ATM layer interface which receives incoming ATM cells, a processor which is typically with an associated translation RAM, and an ATM layer to physical layer interface. The processor decodes the incoming ATM cell to obtain a VPI/VCI, and provides additional routing information (session number) for the cell for multicast purposes. The cell with the additional routing information is forwarded to the physical layer device which has a header processor, a multicast indicator storage table, preferably in the form of a bit map, for storing output line indications by session number, and a plurality of ATM line output interfaces.

Abstract: Methods and apparatus for generating and clearing an excessive bit error rate (EBER) alarm are provided and utilize a reset window algorithm. The BIP-8 bytes (e.g., B2 bytes) of incoming data blocks (each block being B frames long) of an STSn telecommunications signal are monitored in an "idle state" for code violation counts (CV). Upon receiving a data block having a code violation count meeting or exceeding a code violation count threshold (CVSET), a counter is initialized in a "crossing calculation state", and a window comprising a plurality (W) of blocks is monitored. The counter counts the number of incoming blocks in the window having a CV which meets or exceeds CVSET. If in the crossing calculation state, the count meets or exceeds its own threshold (X), an alarm state is entered and an EBER alarm is set. If not, the system returns to the "idle state". Once in the alarm state, every received block is monitored for its code violation count.

Abstract: A super-rate signal is split (213) by an inverse multiplexer (200) into plural SONET STS-1 signals for transmission over separate facilities. At the receiver (500) the plural received signals are likely to have misaligned frames and payloads within the frames. In order to realign the plural signals so that they can be properly recombined to reform the original super-rate signals, the SONET A1 and A2 framing bytes together with the H1 and H2 pointer bytes are extracted (506) and used to determine (507) from where in plural buffers (508) stored frames of each received signal should be read out so that the read out signals are properly aligned. If misalignment of greater than one frame is to be corrected, plural frames of each received signal are stored and the SONET J1 byte is used in conjunction with the framing and pointer bytes to properly align the signals.