Patents by Inventor Joseph Chan

Joseph Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5640043
    Abstract: A high voltage silicon rectifier includes a substrate portion and an epitaxial mesa portion that is a frustrum of a pyramid with a substantially square cross section and side walls that make a forty five degree angle with the substrate portion. The mesa portion includes three germanium doped layers that introduce strain to speed up recombination of charge carriers.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: June 17, 1997
    Assignee: General Instrument Corporation of Delaware
    Inventors: Jack Eng, Joseph Chan, Lawrence Laterza, Gregory Zakaluk, Jun Wu, John Amato, Dennis Garbis, Willem Einthoven
  • Patent number: 5635414
    Abstract: Significant reduction in the cost of fabrication of shallow junction, Schottky or similar semiconductor devices without sacrifice of functional characteristics, while at the same time achieving the advantages is achieved, after the non-polishing cleaning step is essentially performed, by subjecting the substrate to conditions which move disadvantageous factors within said substrate into a space substantially at said surface, followed by substantially removing said factor-containing space from said substrate chemical removal step, followed etching and vapor deposition steps. Although these new steps add time, and therefore cost, to the overall process, the devices under discussion when produced by known industry processes require yet more time, and involve yet more expense, so that the total process represents a substantial reduction in the cost of their manufacture while producing devices which are the equivalent or superior in electrical performance to such devices which are made by known industry processes.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: June 3, 1997
    Inventors: Gregory Zakaluk, Dennis Garbis, Willem Einthoven, Joseph Chan, Jack Eng, Jun Wu, John Amato
  • Patent number: 5630012
    Abstract: There is provided a speech efficient coding method applicable to, e.g., analysis by a synthesis system such as an MBE vocoder, and comprising the steps of (a) dividing an input speech signal into block units on a time base, (b) dividing signals of each of the respective divided blocks into signals in a plurality of frequency bands, (c) discriminating whether signals of each of the respective divided frequency bands which are lower than a first frequency are voiced sound or unvoiced sound, (d) if the discrimination results in step (c) for a predetermined number of frequency bands is voiced sound, assigning a discrimination result of voiced sound to all frequency bands lower than a second frequency which is higher than the first frequency to obtain an ultimate discrimination result of voiced sound/unvoiced sound.
    Type: Grant
    Filed: July 26, 1994
    Date of Patent: May 13, 1997
    Assignee: Sony Corporation
    Inventors: Masayuki Nishiguchi, Jun Matsumoto, Joseph Chan
  • Patent number: 5571329
    Abstract: To minimize contamination of gas flow lines and reactor surfaces from high impurity concentrations present in the CVD reactor, control of the dopant gas supply is located closely adjacent to the reactor input port and the dopant gas supply line is separately vented. First and second dopant gas supplies and a diluent gas supply are connected to branch lines which converge to form the dopant supply line. A solenoid valve is situated in the main dopant supply line as close to the input port as possible. A vent line is connected to the dopant supply line, prior to the solenoid valve. The etchant and silicon gas supplies are each connected to the reactor input by a separate supply line. The etchant and silicon gas supply lines are vented separately from the dopant gas supply line.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: November 5, 1996
    Assignee: GI Corporation
    Inventors: Joseph Chan, Dennis Garbis, John Sapio, John Latza
  • Patent number: 5432121
    Abstract: An all epitaxial process performed entirely in a CVD reactor is employed to grow epitaxial layers with accurately controlled successively low and high dopant concentrations over a heavily doped substrate, eliminating the need for a separate diffusion, even for high purity concentrations. After purging the reactor system, the heavily doped silicon substrate is "capped" by growing two successive very thin silicon sublayers of the same conductivity type. The reactor chamber is subjected to a hydrogen purge to deplete any contaminents after each sublayer is formed. The cap sublayers form a narrow, abrupt intrinsic transition region with the substrate and become an active part of the device structure. A lightly doped epitaxial layer is grown over the "capped" substrate so that a depletion region can be formed in the device under suitable reverse bias. A heavily doped epitaxial layer is then grown over the lightly doped epitaxial layer.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: July 11, 1995
    Assignee: GI Corporation
    Inventors: Joseph Chan, Dennis Garbis, Lawrence Laterza, Gregory Zakaluk
  • Patent number: 5324685
    Abstract: An all epitaxial process performed entirely in a CVD reactor is employed to grow heavily doped layer on lightly doped layer on a heavily doped substrate, eliminating the need for separate diffusion, even for high impurity concentrations. The process starts with a heavily doped silicon substrate of carrier concentration typically greater than 1.times.10.sup.19 per cm.sup.3. To minimize outdiffusion, the substrate is "capped" by growing very thin and heavily doped silicon layers which are depleted by hydrogen purges. A first epitaxial layer is grown over the "capped" substrate. This layer is relatively lightly doped, having a resistivity of more than 200 ohm.cm. A second epitaxial layer is then grown over the first epitaxial layer. The second epitaxial layer has a polarity opposite to that of the substrate and is heavily doped to a resistivity of less than 0.005 ohm cm.
    Type: Grant
    Filed: February 9, 1993
    Date of Patent: June 28, 1994
    Inventors: Reinhold Hirtz, Gregory Zakaluk, Joseph Chan, Dennis Garbis, Lawrence Laterza, Ali Salih