Patents by Inventor Joseph D. Cipollina

Joseph D. Cipollina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Delamination tracking systems and methods
    Patent number: 10586325
    Abstract: A method of determining delamination in a transistor is disclosed including loading a grey scale image of an transistor into memory, generating a black and white image based on the loaded grey scale image, identifying boundaries within the generated black and white image, cropping the black and white image based on the identified boundaries, identifying at least one feature in the cropped black and white image based on the identified boundaries, normalizing the cropped black and white image based on an attribute of the identified at least one feature, cropping the grey scale image based on the normalized black and white image, comparing the cropped grey scale image to a baseline grey scale image of the transistor, and determining a change in a percentage of delamination of the transistor between the baseline grey scale image and the cropped grey scale image based on the comparison.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: March 10, 2020
    Assignee: BAE Systems Controls Inc.
    Inventors: Thomas J. Cummings, Joseph D. Cipollina
  • DELAMINATION TRACKING SYSTEMS AND METHODS
    Publication number: 20190206039
    Abstract: A method of determining delamination in a transistor is disclosed including loading a grey scale image of an transistor into memory, generating a black and white image based on the loaded grey scale image, identifying boundaries within the generated black and white image, cropping the black and white image based on the identified boundaries, identifying at least one feature in the cropped black and white image based on the identified boundaries, normalizing the cropped black and white image based on an attribute of the identified at least one feature, cropping the grey scale image based on the normalized black and white image, comparing the cropped grey scale image to a baseline grey scale image of the transistor, and determining a change in a percentage of delamination of the transistor between the baseline grey scale image and the cropped grey scale image based on the comparison.
    Type: Application
    Filed: January 2, 2018
    Publication date: July 4, 2019
    Applicant: BAE Systems Controls Inc.
    Inventors: Thomas J. Cummings, Joseph D. Cipollina