Abstract: A dynamically controlled amplifier circuit includes a first difference circuit having a first primary differential amplifier and a first crossover differential amplifier running in parallel with the first primary differential amplifier. A second difference circuit has a second primary differential amplifier and a second crossover differential amplifier running in parallel with the second primary differential amplifier. An input terminal is coupled to control electrodes of the first primary differential amplifier and to control electrodes of the second primary differential amplifier. An output terminal of the first primary differential amplifier is coupled to control electrodes of the second crossover differential amplifier, and an output terminal of the second primary differential amplifier is coupled to control electrodes of the first crossover differential amplifier.

Abstract: A complementary dynamically controlled differential amplifier provides an accurate analog input for rail-to-rail common mode inputs. In an embodiment, the amplifier comprises two complementary difference circuits. Each difference circuit has a biasing and gain control section comprising an primary differential amplifier, a crossover differential amplifier, and associated current sources and resistors. Each crossover differential amplifier pair is driven by the output of the complementary difference circuit, with the output of each difference circuit being level shifted prior to driving the crossover differential amplifier pair of the complementary difference circuit. A level shifting section in each difference circuit performs this level shifting function.

Abstract: A differential transimpedance amplifier with reduced input impedance and increased bandwidth having a pair of input contacts, a pair of summing transistors, a pair of feedback transistors, a pair of output resistors, a pair of feedback resistors, a first and a second node and a pair of output contacts. The input contacts each being connected to one or more sources of current that are to be summed and are connected to the pair of summing transistors. The pair of feedback transistors are connected to the pair of input contacts, the pair of feedback resistors and to the first node for differentially reducing the input impedance of the pair of summing transistors and to overcome voltage excursions at the pair of input contacts to increase the operational bandwidth of the transimpedance amplifier.

Abstract: A multiplying digital-to-analog converter produces first and second output currents that have a magnitude difference equal to a gain value multiplied by a magnitude difference between first and second input currents. The multiplying digital-to-analog converter has first and second input nodes for carrying the first and second input currents and first and second output nodes for carrying the first and second output currents. A first input transistor has a first terminal coupled to the first input node, a second terminal with voltage that increases with increases in the first input current, and a third terminal for carrying a first input bias current. A second input transistor has a first terminal coupled to the second input node, a second terminal with a voltage that increases with increases in the second input current, and a third terminal for carrying a second input bias current.