Patents by Inventor Joseph D. Luttmer
Joseph D. Luttmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7187080Abstract: A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (202), forming a dielectric layer (204) over the semiconductor substrate (202), and etching a trench or a via (206) in the dielectric layer (204) to expose a portion of the surface of the semiconductor substrate (202). The method also includes the step of forming a conductive layer (212, 220) within in the trench or the via (206). The method further includes the steps of polishing a portion of the conductive layer (220) and annealing the conductive layer (212, 220) at a predetermined temperature. Moreover, the conductive layer (212, 220) also includes a dopant, and the dopant diffuses substantially to the surface of the top side of the conductive layer (212, 220) to form a dopant oxide layer (212a, 220a) when the conductive layer (212, 220) is annealed at the predetermined temperature and the dopant is exposed to oxygen.Type: GrantFiled: October 14, 2004Date of Patent: March 6, 2007Assignee: Texas Instruments IncorporatedInventors: Qing-Tang Jiang, Changming Jin, Joseph D. Luttmer
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Patent number: 6911394Abstract: A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (202), forming a dielectric layer (204) over the semiconductor substrate (202), and etching a trench or a via (206) in the dielectric layer (204) to expose a portion of the surface of the semiconductor substrate (202). The method also includes the step of forming a conductive layer (212, 220) within in the trench or the via (206). The method further includes the steps of polishing a portion of the conductive layer (220) and annealing the conductive layer (212, 220) at a predetermined temperature. Moreover, the conductive layer (212, 220) also includes a dopant, and the dopant diffuses substantially to the surface of the top side of the conductive layer (212, 220) to form a dopant oxide layer (212a, 220a) when the conductive layer (212, 220) is annealed at the predetermined temperature and the dopant is exposed to oxygen.Type: GrantFiled: January 13, 2003Date of Patent: June 28, 2005Assignee: Texas Instruments IncorporatedInventors: Qing-Tang Jiang, Changming Jin, Joseph D. Luttmer
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Patent number: 6784121Abstract: A xerogel aging system includes an aging chamber (190) with inlets and outlet and flows a gel catalyst in gas phase over a xerogel precursor film on a semiconductor wafer. Preferred embodiments use an ammonia and water vapor gas mixture catalyst.Type: GrantFiled: October 23, 1998Date of Patent: August 31, 2004Assignee: Texas Instruments IncorporatedInventors: Changming Jin, Richard Scott List, Joseph D. Luttmer
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Patent number: 6284675Abstract: A phase separation during solvent evaporation of a solution containing polymer precursors leaves low pressure solvent without polymer precursor in minimal gaps. After polymerization, drive off the low pressure solvent to yield air gaps in the minimal gaps under the polymer.Type: GrantFiled: May 26, 1999Date of Patent: September 4, 2001Assignee: Texas Instruments IncorporatedInventors: Changming Jin, Joseph D. Luttmer
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Patent number: 6063692Abstract: A method of fabricating an oxidation barrier for a thin film is provided. The method may include forming a thin film (10) outwardly from a semiconductor substrate (12) and separated from the semiconductor substrate (12) by a primary insulator layer (14). A reactive layer (16) may be formed in-situ adjacent to the thin film (10). An oxidation barrier (20) may be formed by a chemical reaction between the thin film (10) and the reactive layer (16). The oxidation barrier (20) may comprise a silicide alloy that operates to reduce oxidation of the thin film (10).Type: GrantFiled: December 14, 1998Date of Patent: May 16, 2000Assignee: Texas Instruments IncorporatedInventors: Wei William Lee, Joseph D. Luttmer, Hong Yang
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Patent number: 5523241Abstract: Channel stops for MIS infrared photodetector devices in Hg.sub.1-x Cd.sub.x Te by lattice damage (454) between and automatically aligned to MIS gates (408). Also, field plates and guard rings are automatically aligned to MIS gates.Type: GrantFiled: December 21, 1994Date of Patent: June 4, 1996Assignee: Texas Instruments IncorporatedInventors: Chang-Feng Wan, Joseph D. Luttmer, Julie S. England, David E. Fleming
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Patent number: 5248636Abstract: A processing apparatus and method wherein a wafer is exposed to activated species generated by a first plasma which is separate from the wafer, but is in the process gas flow stream upstream of the wafer, and is also exposed to plasma bombardment generated by a second plasma which has a dark space which substantially adjoins the surface of the wafer. The in situ plasma is relatively low-power, so that the remote plasma can generate activated species, and therefore the in situ plasma power level can be adjusted to optimize the plasma bombardment. Ultraviolet light to illuminate the face of a wafer being processed is generated by a plasma which is within the vacuum chamber but is remote from the face of the wafer. It is useful to design the gas flow system such that the ultraviolet-generating plasma has its own gas feed, and the reaction products from the ultraviolet-generating plasma do not substantially flow or diffuse to the wafer face.Type: GrantFiled: June 2, 1992Date of Patent: September 28, 1993Assignee: Texas Instruments IncorporatedInventors: Cecil J. Davis, Rhett B. Jucha, Joseph D. Luttmer, Rudy L. York, Lee M. Loewenstein, Robert T. Matthews, Randall C. Hildenbrand
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Patent number: 5188970Abstract: Method of manufacturing an infrared detector having a refractory metal (16) within the metal-insulator-semiconductor structure (MIS) provides a process applicable for high volume production of infrared focal plane array detectors. The process of the present invention uses a refractory metal such as tantalum as the gate (16) which is less susceptible to the etching by the bromine solution used to etch the vias (22) as compared to aluminum. Additionally, the etching of the refractory metal film to form the MIS structure can be done with a fluorine-containing plasma, thus avoiding the corrosion of the metal associated with etching aluminum metal films in a chlorine-containing plasma.Type: GrantFiled: April 9, 1992Date of Patent: February 23, 1993Assignee: Texas Instruments IncorporatedInventors: Rudy L. York, Joseph D. Luttmer, Chang F. Wan, Thomas W. Orent, Larry D. Hutchins, Art Simmons
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Patent number: 5157000Abstract: A process is disclosed through which vias (50) can be formed by the reaction of an etchant species (52) with a mercury cadmium telluride (HgCdTe) or zinc sulfide (ZnS) layer (42). The activating gases (20) are preferably a hydrogen gas or a methane gas which is excited in a diode plasma reactor (100) which has an RF power source (13) applied to one of two parallel electrodes. The etching occurs in selected areas in a photoresist pattern (44) residing over the ZnS or HgCdTe layer (42). Wet etching the layer (42) with a wet etchant (54) following the dry etching, improves the via (50) by making the walls (48) smoother, and allowing for expansion of the vias (50) to a dimension necessary for proper operation of a HgCdTe-based infrared detector.Type: GrantFiled: February 8, 1991Date of Patent: October 20, 1992Assignee: Texas Instruments IncorporatedInventors: Jerome L. Elkind, Patricia B. Smith, Larry D. Hutchins, Joseph D. Luttmer, Rudy L. York, Julie S. England
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Patent number: 5138973Abstract: A processing apparatus and method wherein a wafer is exposed to activated species generated by a first plasma which is separate from the wafer, but is in the process gas flow stream upstream of the wafer, and is also exposed to plasma bombardment generated by a second plasma which has a dark space which substantially adjoins the surface of the wafer. The in situ plasma is relatively low-power, so that the remote plasma can generate activated species, and therefore the in situ plasma power level can be adjusted to optimize the plasma bombardment. Ultraviolet light to illuminate the face of a wafer being processed is generated by a plasma which is within the vacuum chamber but is remote from the face of the wafer and controlled independent of the in situ plasma. It is useful to design the gas flow system such that the ultraviolet-generating plasma has its own gas feed, and the reaction products from the ultraviolet-generating plasma do not substantially flow or diffuse to the wafer face.Type: GrantFiled: December 5, 1988Date of Patent: August 18, 1992Assignee: Texas Instruments IncorporatedInventors: Cecil J. Davis, Rhett B. Jucha, Joseph D. Luttmer, Rudy L. York, Lee M. Loewenstein, Robert T. Matthews, Randall C. Hildenbrand
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Patent number: 5132761Abstract: Method of manufacturing an infrared detector having a refractory metal (16) within the metal-insulator-semiconductor structure (MIS) provides a process applicable for high volume production of infrared focal plane array detectors. The process of the present invention uses a refractory metal such as tantalum as the gate (16) which is less susceptible to the etching by the bromine solution used to etch the vias (22) as compared to aluminum. Additionally, the etching of the refractory metal film to form the MIS structure can be done with a fluorine-containing plasma, thus avoiding the corrosion of the metal associated with etching aluminum metal films in a chlorine-containing plasma.Type: GrantFiled: October 1, 1990Date of Patent: July 21, 1992Assignee: Texas Instruments IncorporatedInventors: Rudy L. York, Joseph D. Luttmer, Chang F. Wan, Thomas W. Orent, Larry D. Hutchins, Art Simmons
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Patent number: 5077092Abstract: The deposition of zinc sulfide films (16) using dimethylzinc (46) and hydrogen sulfide (44) in a vacuum processor reactor (50) provides a low temperature process applicable for high volume production of infrared focal planes. These layers (16) of zinc sulfide are used as insulators and infrared anti-reflective coatings which are free of contamination relative to physical vapor deposited ZnS films. The zinc sulfide layers (16) are formed by evacuating a chamber (62) and mixing hydrogen sulfide gas (44) and dimethylzinc gas (46) at specific operating conditions until the desired ZnS film thickness is obtained. The rate of growth of the zinc sulfide (16) film is controlled by varying the temperature, pressure, and the relative flow rates of the hydrogen sulfide gas (44) and the dimethylzinc gas (46).Type: GrantFiled: June 30, 1989Date of Patent: December 31, 1991Assignee: Texas Instruments IncorporatedInventors: Patricia B. Smith, Larry D. Hutchins, Rudy L. York, Joseph D. Luttmer, Cecil J. Davis
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Patent number: 5017511Abstract: A process is disclosed through which vias (50) can be formed by the reaction of an etchant species (52) with a mercury cadmium telluride (HgCdTe) or zinc sulfide (ZnS) layer (42). The activating gases (20) are preferably a hydrogen gas or a methane gas which is excited in a diode plasma reactor (100) which has an RF power source (13) applied to one of two parallel electrodes. The etching occurs in selected areas in a photoresist pattern (44) residing over the ZnS or HgCdTe layer (42). Wet etching the layer (42) with a wet etchant (54) following the dry etching, improves the via (50) by making the walls (48) smoother, and allowing for expansion of the vias (50) to a dimension necessary for proper operation of a HgCdTe-based infrared detector.Type: GrantFiled: July 10, 1989Date of Patent: May 21, 1991Assignee: Texas Instruments IncorporatedInventors: Jerome L. Elkind, Patricia B. Smith, Larry D. Hutchins, Joseph D. Luttmer, Rudy L. York, Julie S. England
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Patent number: 4988533Abstract: A processing apparatus and method for depositing a silicon oxide layer on a temperature sensitive wafer utilizing a single process chamber provide nitrous oxide gas to the chamber with the excitation energy being provided by a remotely generated plasma while supplying silane gas in combination with illuminating the wafer with an in situ generated ultraviolet energy to produce the silicon oxide layer.Type: GrantFiled: May 27, 1988Date of Patent: January 29, 1991Assignee: Texas Instruments IncorporatedInventors: Dean W. Freeman, Joseph D. Luttmer, Patricia B. Smith, Cecil J. Davis
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Patent number: 4949671Abstract: A processing apparatus and method wherein two separate gas feeds are provided in proximity to the face of a face down wafer. A shroud can be used to maximize mixing of the two gas feed streams without excessive residence time.Type: GrantFiled: December 21, 1985Date of Patent: August 21, 1990Assignee: Texas Instruments IncorporatedInventors: Cecil J. Davis, Robert T. Matthews, Rudy L. York, Joseph D. Luttmer, Dwain R. Jakubik, James B. Hunter
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Patent number: 4877757Abstract: A processing apparatus and method for depositing a passivating layer on a mercury-cadmium-telluride wafer utilizing a single process chamber to provide oxygen gas to the chamber with the excitation energy being provided by a remotely generated plasma in order to remove any organic residue and then supplying either a sulfide or selenide gas in combination with illuminating the wafer with an in situ generated ultraviolet energy to produce a passivating layer.Type: GrantFiled: December 7, 1988Date of Patent: October 31, 1989Assignee: Texas Instruments IncorporatedInventors: Rudy L. York, Joseph D. Luttmer, Patricia B. Smith, Cecil J. Davis
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Patent number: 4876222Abstract: A method of passivation of Hg.sub.1-x Cd.sub.x Te and similar semiconductors by chemical reaction to either sulfide or selenide or a combination of both with an oxidizer such as polysulfide or polyselenide ions in solution.Type: GrantFiled: September 28, 1988Date of Patent: October 24, 1989Assignee: Texas Instrument IncorporatedInventors: Joseph D. Luttmer, D. Dawn Little
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Patent number: 4855160Abstract: A high pressure processing apparatus and method which is compatible with a system wherein wafers are largely transported and processed under vacuum. The pressure vessel can be extremely small, i.e. has a total pressurized volume of which almost all interior points are within one or two centimeters of one of the workpiece or wafers which may be loaded into the chamber. HgCdTe is passivated by utilizing oxygen and water vapor for oxidation or a source of sulfur for sulfidization. The wafers and the gases are heated by a heater located on the vertical walls of the process chamber.Type: GrantFiled: May 26, 1988Date of Patent: August 8, 1989Assignee: Texas Instruments IncorporatedInventors: Joseph D. Luttmer, Cecil J. Davis, Patricia B. Smith, Rudy L. York
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Patent number: 4838984Abstract: A film of mercury-cadmium-telluride (HgCdTe) or zinc sulfide (ZnS) is anisotropically etched utilizing a remote plasma and an in situ plasma utilizing a gas mixture which includes a hydrogen containing and/or an alkyl bearing gas providing an anisotropic etch.Type: GrantFiled: July 16, 1987Date of Patent: June 13, 1989Assignee: Texas Instruments IncorporatedInventors: Joseph D. Luttmer, Cecil J. Davis, Patricia B. Smith, Rudy L. York, Lee M. Loewenstein, Rhett B. Jucha
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Patent number: 4837113Abstract: A II-VI compound, such as zinc sulfide, is deposited from a gaseous mixture in a reactor which is compatible with a vacuum processing system which includes vacuum wafer transport. Two manifolds are used, each connected to a supply of one or more reagent gases, to improve uniformity.Type: GrantFiled: May 25, 1988Date of Patent: June 6, 1989Assignee: Texas Instruments IncorporatedInventors: Joseph D. Luttmer, Rudy L. York, Patricia B. Smith, Cecil J. Davis