Patents by Inventor Joseph D. Russell

Joseph D. Russell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5633602
    Abstract: A means of converting low voltage CMOS logic levels operating with a 3.3 volts logic level to low voltage PECL logic levels operating with a 3.3 volts supply voltage and a 0.8 volts logic level. The circuit design is process insensitive, and the characteristics of the converter emulate the emitter follower outputs of ECL devices. The converter solves the signal ringing problems caused by open output conditions, and is less susceptible to electromagnetic interference.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: May 27, 1997
    Assignee: NCR Corporation
    Inventors: Ikuo J. Sanwo, Joseph D. Russell, Juei-Po Lin