Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.

Abstract: Techniques for dynamically generating a headroom voltage for an envelope tracking system. In an aspect, an initial headroom voltage is updated when a signal from a power amplifier (PA) indicates that the PA headroom is insufficient. The initial headroom voltage may be updated to an operating headroom voltage that includes the initial voltage plus a deficiency voltage plus a margin. In this manner, the operating headroom voltage may be dynamically selected to minimize power consumption while still ensuring that the PA is linear. In a further aspect, a specific exemplary embodiment of a headroom voltage generator using a counter is described.

Abstract: Techniques for providing negative current information to a control loop for a buck converter in reverse boost mode. In an aspect, negative as well as positive current through an inductor is sensed and provided to adjust a ramp voltage in the control loop for the buck converter. The techniques may prevent current through the inductor during reverse boost mode from becoming increasingly negative without bound; the techniques thereby reduce settling times when the target output voltage is reduced from a first level to a second level. In an aspect, the negative current sensing may be provided by sensing negative current through a charging, or PMOS, switch of the buck converter. The sensed negative current may be subtracted from a current used to generate the ramp voltage.

Abstract: Techniques for preventing reverse current in applications wherein a tracking supply voltage is placed in parallel with a switching power stage. The tracking supply voltage may be boosted to a level higher than a battery supply voltage using, e.g., a boost converter. In an aspect, a negative current detection block is provided to detect negative current flow from the boosted tracking supply voltage to the battery supply voltage. A high-side switch of the switching power stage may be disabled in response to detecting the negative current. To prevent false tripping, the tracking supply voltage may be further compared with the battery supply voltage, and a latch may be provided to further control the high-side switch.

Abstract: The present disclosure includes systems and methods for 100% duty cycle in switching regulators. A switching regulator circuit includes a ramp generator to produce a ramp signal having a period and a comparator to receive the ramp signal and an error signal, and in accordance therewith, produce a modulation signal. In a first mode of operation, the ramp signal increases to intersect the error signal, and in accordance therewith, changes a state of a switching transistor during each period of the ramp signal. In a second mode of operation, the error signal increase above a maximum value of the ramp signal, and in accordance therewith, the switching transistor is turned on for one or more full periods of the ramp signal.

Abstract: In one embodiment, a circuit comprises a current source to produce current to a light emitting diode array. An analog dimming circuit generates a continuous control signal to the current source to control the current in the light emitting diode array according to a range of control signal values when the control signal is above a threshold. Below the threshold, a digital modulation circuit generates an additional modulated digital signal to the current source to control the current in the light emitting diode array according to a range of modulation values when the continuous control signal is below the threshold. The continuous control signal produces current from the current source into the light emitting diode array above a first value. The combination of the continuous control signal and the modulated digital signal produces current in the light emitting diode array below the first value.

Abstract: In one embodiment, a circuit comprises a current source to produce current to a light emitting diode array. An analog dimming circuit generates a continuous control signal to the current source to control the current in the light emitting diode array according to a range of control signal values when the control signal is above a threshold. Below the threshold, a digital modulation circuit generates an additional modulated digital signal to the current source to control the current in the light emitting diode array according to a range of modulation values when the continuous control signal is below the threshold. The continuous control signal produces current from the current source into the light emitting diode array above a first value. The combination of the continuous control signal and the modulated digital signal produces current in the light emitting diode array below the first value.

Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.

Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.

Abstract: Techniques for dynamically generating a headroom voltage for an envelope tracking system. In an aspect, an initial headroom voltage is updated when a signal from a power amplifier (PA) indicates that the PA headroom is insufficient. The initial headroom voltage may be updated to an operating headroom voltage that includes the initial voltage plus a deficiency voltage plus a margin. In this manner, the operating headroom voltage may be dynamically selected to minimize power consumption while still ensuring that the PA is linear. In a further aspect, a specific exemplary embodiment of a headroom voltage generator using a counter is described.

Abstract: Techniques for dynamically generating a headroom voltage for an envelope tracking system. In an aspect, an initial headroom voltage is updated when a signal from a power amplifier (PA) indicates that the PA headroom is insufficient. The initial headroom voltage may be updated to an operating headroom voltage that includes the initial voltage plus a deficiency voltage plus a margin. In this manner, the operating headroom voltage may be dynamically selected to minimize power consumption while still ensuring that the PA is linear. In a further aspect, a specific exemplary embodiment of a headroom voltage generator using a counter is described.

Abstract: The present disclosure includes systems and methods for 100% duty cycle in switching regulators. A switching regulator circuit includes a ramp generator to produce a ramp signal having a period and a comparator to receive the ramp signal and an error signal, and in accordance therewith, produce a modulation signal. In a first mode of operation, the ramp signal increases to intersect the error signal, and in accordance therewith, changes a state of a switching transistor during each period of the ramp signal. In a second mode of operation, the error signal increase above a maximum value of the ramp signal, and in accordance therewith, the switching transistor is turned on for one or more full periods of the ramp signal.

Abstract: Techniques for preventing reverse current in applications wherein a tracking supply voltage is placed in parallel with a switching power stage. The tracking supply voltage may be boosted to a level higher than a battery supply voltage using, e.g., a boost converter. In an aspect, a negative current detection block is provided to detect negative current flow from the boosted tracking supply voltage to the battery supply voltage. A high-side switch of the switching power stage may be disabled in response to detecting the negative current. To prevent false tripping, the tracking supply voltage may be further compared with the battery supply voltage, and a latch may be provided to further control the high-side switch.

Abstract: Techniques for providing negative current information to a control loop for a buck converter in reverse boost mode. In an aspect, negative as well as positive current through an inductor is sensed and provided to adjust a ramp voltage in the control loop for the buck converter. The techniques may prevent current through the inductor during reverse boost mode from becoming increasingly negative without bound; the techniques thereby reduce settling times when the target output voltage is reduced from a first level to a second level. In an aspect, the negative current sensing may be provided by sensing negative current through a charging, or PMOS, switch of the buck converter. The sensed negative current may be subtracted from a current used to generate the ramp voltage.

Abstract: Techniques for dynamically generating a headroom voltage for an envelope tracking system. In an aspect, an initial headroom voltage is updated when a signal from a power amplifier (PA) indicates that the PA headroom is insufficient. The initial headroom voltage may be updated to an operating headroom voltage that includes the initial voltage plus a deficiency voltage plus a margin. In this manner, the operating headroom voltage may be dynamically selected to minimize power consumption while still ensuring that the PA is linear. In a further aspect, a specific exemplary embodiment of a headroom voltage generator using a counter is described.

Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.