Abstract: A radar system receiver having an antenna system adapted to receive a jammer signal from both a direct path and from an indirect path. The direct and indirect paths have both differential Doppler frequency and differential time delay induced phase shifts. The antenna system includes a plurality of antenna elements. A plurality of radar receiver sections, each one having a clutter filter, is provided. Each one of the receiver sections is fed by a corresponding one of the antenna elements. An adaptive jammer canceler is fed by the plurality of radar receiver sections for providing a beam forming network to suppress both the direct and indirect paths of the jamming signal.

Abstract: A localized interference nulling preprocessor for a Fast Fourier Transform (FFT) or a Butler matrix system includes a means for forming a dot product of a signal vector and each of the preprocessed eigen vectors of the virtual interference covariance matrix of a predetermined localized interference, means for scaling the conjugate of the principal eigen vectors by the dot product, and means for subtracting from the signal vector the product of each dot product and conjugate of principal eigen vectors to generate a preprocess signal vector modified to produce a localized nulling of predetermined localized interference by a Fast Fourier Transform (FFT) or Butler matrix system.

Abstract: A signal processor for use in a small, lightweight radar-guided missile to provide a discrete Fast Fourier Transform (FFT) on received radar return signals. The radar return signal are converted into a sequence of binary digits enabling a simple decoder to perform complex addition and subtraction processing, thereby minimizing the space and complexity of the signal processor.

Abstract: A signal processor for use in a small, lightweight radar-guided missile to provide a discrete Fast Fourier Transform (FFT) on received radar return signals. The radar return signals are converted into a sequence of binary digits enabling a simple decoder to perform complex addition and subtraction processing, thereby minimizing the space and complexity of the signal processor.