Patents by Inventor Joseph E. Berthold

Joseph E. Berthold has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8204382
    Abstract: The present disclosure provides radio frequency (RF)-based OTN systems and methods. This includes a framework to carry services over RF-based links without using SONET/SDH or asynchronous radio. In an exemplary embodiment, the present disclosure utilizes an OTN framework over RF. Additionally, the present disclosure can also apply to other non-OTN frameworks such as an extended Ethernet frame with forward error correction (FEC) over RF-based links. The present disclosure combines existing OTN FEC with a radio FEC or with an over-the-air FEC to reduce the OTN FEC. Additionally, the present disclosure utilizes unused overhead to communicate RF data rates between radios.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: June 19, 2012
    Assignee: Ciena Corporation
    Inventors: Michaƫl Gazier, Phillips T. Salman, Joseph E. Berthold
  • Publication number: 20100232785
    Abstract: The present disclosure provides radio frequency (RF)-based OTN systems and methods. This includes a framework to carry services over RF-based links without using SONET/SDH or asynchronous radio. In an exemplary embodiment, the present disclosure utilizes an OTN framework over RF. Additionally, the present disclosure can also apply to other non-OTN frameworks such as an extended Ethernet frame with forward error correction (FEC) over RF-based links. The present disclosure combines existing OTN FEC with a radio FEC or with an over-the-air FEC to reduce the OTN FEC. Additionally, the present disclosure utilizes unused overhead to communicate RF data rates between radios.
    Type: Application
    Filed: March 11, 2009
    Publication date: September 16, 2010
    Inventors: Michael GAZIER, Phillips T. Salman, Joseph E. Berthold
  • Patent number: 6434290
    Abstract: An optical switch is described having a plurality of optical input ports, and a plurality of optical output ports. A plurality of mirrors are further included, each of which being configured to direct at least a portion of an optical signal supplied to one of the plurality of optical input ports to a corresponding one of the plurality of optical output ports, such that an intensity associated with each of said plurality of optical signals output from the optical switch is substantially the same.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: August 13, 2002
    Assignee: Ciena Corporation
    Inventor: Joseph E. Berthold
  • Patent number: 4587545
    Abstract: A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body, an n+ type cathode region located at the other end. An n+ type gate region exists in a portion of the semiconductor body other than the portion which directly separates the anode and cathode regions. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. Separate low resistance electrical contacts are made to the anode, cathode, and gate regions and to the substrate. The switch is capable of switching from an "ON" and conducting state to an "OFF" (blocking) state by adjusting the potential of the gate region and without having to adjust the potential of the anode or cathode regions.
    Type: Grant
    Filed: March 27, 1981
    Date of Patent: May 6, 1986
    Assignee: AT&T Bell Laboratories
    Inventors: Joseph E. Berthold, Adrian R. Hartman, Terence J. Riley, Peter W. Shackle
  • Patent number: 4242697
    Abstract: A structure for achieving closely spaced high voltage devices in integrated circuits. The devices are formed in single crystalline tubs (11) in a polycrystalline substrate (10). In order to prevent the potential of the substrate from causing breakdown of the devices, there is included between the single crystalline tubs and the polycrystalline substrate a semi-insulating layer (13) which has trapping states capable of taking on charge from the single crystalline region. The shielding provided by the semi-insulating layer permits the surface regions of the device to be made closer to the polycrystalline substrate and the tubs to be made more shallow.
    Type: Grant
    Filed: March 14, 1979
    Date of Patent: December 30, 1980
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Joseph E. Berthold, Adrian R. Hartman, Peter W. Shackle