Patents by Inventor Joseph E. Foster

Joseph E. Foster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11086797
    Abstract: A method for restricting write access to a non-volatile memory. The method includes receiving a request to write to a protected location in the non-volatile memory and determining whether the protected location is in a write-protected state. If the protected location is not in a write-protected state, the method includes writing data indicated by the request to the protected location. If the protected location is in a write-protected state, the method includes rejecting the request. The protected location stores a validation key to validate the contents of another portion of the non-volatile memory.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: August 10, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gregg B. Lesartre, Joseph E. Foster, David Plaquin, James M. Mann
  • Patent number: 10649680
    Abstract: According to an example, a dual-port non-volatile dual in-line memory module (NVDIMM) includes a first port to provide a central processing unit (CPU) with access to universal memory of the dual-port NVDIMM and a second port to provide an external NVDIMM manager circuit with access to the universal memory of the dual-port NVDIMM. Accordingly, a media controller of the dual-port NVDIMM may store data received from the CPU through the first port in the universal memory, control dual-port settings received from the CPU, and transmit the stored data to the NVDIMM manager circuit through the second port of the dual-port NVDIMM.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: May 12, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dwight D. Riley, Joseph E. Foster, Thierry Fevrier
  • Patent number: 10157017
    Abstract: According to an example, data may be replicated using a dual-port nonvolatile dual in-line memory module (NVDIMM). A processor may request, through a first port of the dual-port NVDIMM, to store data to universal memory of the dual-port NVDIMM and to commit the data to remote storage according to a high-availability storage capability of the dual-port NVDIMM. The process may then receive a notification from the dual-port NVDIMM that the data has been transparently committed to the remote storage through a second port of the dual-port NVDIMM.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: December 18, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dwight D. Riley, Joseph E. Foster, Thierry Fevrier
  • Patent number: 10050645
    Abstract: A technique includes jointly encrypting and error encoding plain text data. The joint encryption and error encoding includes processing plain text data in an encryption cipher comprising a plurality of successive rounds to generate cipher text data; and embedding error correction encoding in the encryption cipher to error correction encode the cipher text data.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: August 14, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Han Wang, Joseph E. Foster, Raghavan V. Venugopal, Patrick A. Raymond
  • Patent number: 10025512
    Abstract: Processing data in a distributed data storage system generates a sparse check matrix correlating data elements to data syndromes. The system receives notification of a failed node in the distributed data storage system, accesses the sparse check matrix, and determines from the sparse check matrix a correlation between a data element and a syndrome. The system processes a logical operation on the data element and the syndrome and recovers the failed node.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: July 17, 2018
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Han Wang, Joseph E. Foster, Patrick A. Raymond, Raghavan V. Venugopal
  • Patent number: 10019363
    Abstract: Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a processor, a copy command to version an image page for an atomic transaction. The version controller may receive application data addressed to a cache line of the image page, and may write the application data to a cache line of the copy page corresponding to the addressed cache line of the image page. If the version controller receives a replace-type transaction commit command, the version controller may generate a final page by either forward merging the image page into the copy page or backward merging the copy page into the image page, depending a merge direction policy.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: July 10, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Douglas L. Voigt, Charles B. Morrey, III, Jishen Zhao, Dhruva Chakrabarti, Joseph E. Foster
  • Publication number: 20180004422
    Abstract: According to an example, a dual-port non-volatile dual in-line memory module (NVDIMM) includes a first port to provide a central processing unit (CPU) with access to universal memory of the dual-port NVDIMM and a second port to provide an external NVDIMM manager circuit with access to the universal memory of the dual-port NVDIMM. Accordingly, a media controller of the dual-port NVDIMM may store data received from the CPU through the first port in the universal memory, control dual-port settings received from the CPU, and transmit the stored data to the NVDIMM manager circuit through the second port of the dual-port NVDIMM.
    Type: Application
    Filed: April 30, 2015
    Publication date: January 4, 2018
    Inventors: Dwight D. Riley, Joseph E. Foster, Thierry Fevrier
  • Publication number: 20170371776
    Abstract: According to an example, a fabric manager server may migrate data stored in a dual-interface non-volatile dual in-line memory module (NVDIMM) of a memory application server. The fabric manager server may receive data routing preferences for a memory fabric and retrieve the data stored in universal memory of the dual-port NVDIMM according to the data routing preferences through a second port of the dual-port NVDIMM. The retrieved data may then be routed from the dual-port NVDIMM for replication to remote storage according to the data routing preferences. Once the retrieved data is replicated to remote storage, the fabric manager may alert the dual-port NVDIMM.
    Type: Application
    Filed: April 30, 2015
    Publication date: December 28, 2017
    Inventors: Dwight D. Riley, Thierry Fevrier, Joseph E. Foster
  • Publication number: 20170293573
    Abstract: A method for restricting write access to a non-volatile memory. The method includes receiving a request to write to a protected location in the non-volatile memory and determining whether the protected location is in a write-protected state. If the protected location is not in a write-protected state, the method includes writing data indicated by the request to the protected location. If the protected location is in a write-protected state, the method includes rejecting the request. The protected location stores a validation key to validate the contents of another portion of the non-volatile memory.
    Type: Application
    Filed: October 31, 2014
    Publication date: October 12, 2017
    Inventors: Gregg B. LESARTRE, Joseph E. FOSTER, David PLAQUIN, James M. MANN
  • Publication number: 20170286297
    Abstract: Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a processor, a copy command to version an image page for an atomic transaction. The version controller may receive application data addressed to a cache line of the image page, and may write the application data to a cache line of the copy page corresponding to the addressed cache line of the image page. If the version controller receives a replace-type transaction commit command, the version controller may generate a final page by either forward merging the image page into the copy page or backward merging the copy page into the image page, depending a merge direction policy.
    Type: Application
    Filed: April 3, 2015
    Publication date: October 5, 2017
    Inventors: Douglas L. Voigt, Charles B. MORREY, III, Jishen ZHAO, Dhruva CHAKRABARTI, Joseph E. FOSTER
  • Publication number: 20170242593
    Abstract: According to an example, data may be replicated using a dual-port nonvolatile dual in-line memory module (NVDIMM). A processor may request, through a first port of the dual-port NVDIMM, to store data to universal memory of the dual-port NVDIMM and to commit the data to remote storage according to a high-availability storage capability of the dual-port NVDIMM. The process may then receive a notification from the dual-port NVDIMM that the data has been transparently committed to the remote storage through a second port of the dual-port NVDIMM.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 24, 2017
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Dwight D. RILEY, Joseph E. FOSTER, Thierry FEVRIER
  • Patent number: 9672150
    Abstract: To migrate data from a first storage system to a second storage system, the second storage system detects a migration of a persistent storage media from the first storage system to the second storage system. In response to detecting the migration of the persistent storage media, write information from a write cache in the first storage system is copied to a write cache in the second storage system, where the write caches in the first and second storage systems were not maintained synchronously before the write information from the write cache in the first storage system is copied to the write cache in the second storage system.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: June 6, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jeffrey A. Plank, Joseph E. Foster, Vincent Nguyen, Robert E. Van Cleve
  • Publication number: 20170046226
    Abstract: Processing data in a distributed data storage system generates a sparse check matrix correlating data elements to data syndromes. The system receives notification of a failed node in the distributed data storage system, accesses the sparse check matrix, and determines from the sparse check matrix a correlation between a data element and a syndrome. The system processes a logical operation on the data element and the syndrome and recovers the failed node.
    Type: Application
    Filed: June 17, 2014
    Publication date: February 16, 2017
    Inventors: Han Wang, Joseph E. Foster, Patrick A. Raymond, Raghavan V. Venugopal
  • Publication number: 20160344428
    Abstract: A technique includes jointly encrypting and error encoding plain text data. The joint encryption and error encoding includes processing plain text data in an encryption cipher comprising a plurality of successive rounds to generate cipher text data; and embedding error correction encoding in the encryption cipher to error correction encode the cipher text data.
    Type: Application
    Filed: January 30, 2014
    Publication date: November 24, 2016
    Inventors: Han Wang, Joseph E. Foster, Raghavan V. Venugopal, Patrick A. Raymond
  • Patent number: 8417967
    Abstract: Embodiments include methods, apparatus, and systems for storage device data encryption. One method includes encrypting data on a storage device with a key and then transmitting the key to a cryptographic module that encrypts the key to form a Binary Large Object (BLOB). The BLOB is transmitted to an array controller that is coupled to the storage device which stores the BLOB.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: April 9, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Joseph E. Foster, Robert C. Elliott, Jeffrey A. Plank
  • Patent number: 8151014
    Abstract: The apparatus in one example may have: at first and second processing devices; at least one sequence of processes for the first and second devices; the at least one sequence having a command forward instruction such that, after the first processing device completes processing a first process of the at least one sequence of processes, the first processing device forwards, without producing an interrupt, the command forward instruction to the second processing device to effect processing of a second process of the at least one sequence of processes.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: April 3, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Joseph E. Foster
  • Publication number: 20110296100
    Abstract: To migrate data from a first storage system to a second storage system, the second storage system detects a migration of a persistent storage media from the first storage system to the second storage system. In response to detecting the migration of the persistent storage media, write information from a write cache in the first storage system is copied to a write cache in the second storage system, where the write caches in the first and second storage systems were not maintained synchronously before the write information from the write cache in the first storage system is copied to the write cache in the second storage system.
    Type: Application
    Filed: May 26, 2010
    Publication date: December 1, 2011
    Inventors: JEFFREY A. PLANK, Joseph E. Foster, Vincent Nguyen, Robert E. Van Cleve
  • Patent number: 8028717
    Abstract: A double valve having inlet, outlet, and exhaust ports maintains an outlet pressure below one percent of inlet pressure during a faulted state while maintaining a relatively small exhaust for reduced overall valve size. Crossover passages receive inlet pressure through main crossover poppets when the respective valve units are not in a deactuated position. When the valve units are in a deactuated position, then the crossover passages receive inlet pressure through respective bypass passages whose flow rate can be controlled independently from the size of the crossover poppets. The use of bypass passages provides particular benefits for double valves for non-press applications which have a ratio of exhaust flow coefficient to inlet flow coefficient that is less than about 2.5.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: October 4, 2011
    Assignee: Ross Operating Valve Company
    Inventors: Joseph E. Foster, Richard Schnell, Deborah Schnell, legal representative
  • Publication number: 20110225353
    Abstract: In at least some embodiments, a computing system includes a processor and a communication bus external to the processor. The computing system also includes a Redundant Array of Independent Disks (RAID) write cache sub-assembly coupled to the communication bus, the RAID write cache sub-assembly having non-volatile memory.
    Type: Application
    Filed: October 30, 2008
    Publication date: September 15, 2011
    Inventors: Robert C Elliott, Joseph E. Foster, Siamak Tavallaei
  • Publication number: 20110029785
    Abstract: Embodiments include methods, apparatus, and systems for storage device data encryption. One method includes encrypting data on a storage device with a key and then transmitting the key to a cryptographic module that encrypts the key to form a Binary Large Object (BLOB). The BLOB is transmitted to an array controller that is coupled to the storage device which stores the BLOB.
    Type: Application
    Filed: April 2, 2008
    Publication date: February 3, 2011
    Inventors: Joseph E. Foster, Robert Elliot, Jeffrey A. Plank