Patents by Inventor Joseph E. Glenn

Joseph E. Glenn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Ternary CAM bitcells
    Patent number: 7042747
    Abstract: Two new ternary CAM bitcell design options are presented that provide compact layout solutions while maximizing matchline channels routing through the cells. In both layouts, the first inventive layout, an asymmetric layout of the 6T-SRAM bitcell is used to improve ease of layout, density, and performance of ternary CAM cells. In the second inventive layout, n-type diffusions for the SRAM bitcell and the comparison circuit are separated, creating a bitcell having a more even cell aspect ratio.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: May 9, 2006
    Assignee: LSI Logic Corporation
    Inventors: Ruggero Castagnetti, Ramnath Venkatraman, Joseph E. Glenn