Patents by Inventor Joseph F. Rantala

Joseph F. Rantala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory system with dynamically allocatable non-volatile storage capability
    Patent number: 5680570
    Abstract: A memory system having volatile storage of data destined for secondary storage and smaller intermediate non-volatile storage of some of the data. The volatile memory is an array of DRAM storage devices integrated with the non-volatile memory array of SRAM devices by a mapping logic unit. The DRAM array stores all the data blocks destined for secondary storage. In contrast, the smaller SRAM array stores only the data requiring safe storage, which typically is a subset of the data stored in the DRAM array. The mapping logic unit manages the use of the SRAM array.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: October 21, 1997
    Assignee: Quantum Corporation
    Inventors: Joseph F. Rantala, John K. Grooms, Charles F. Cassidy
  • Memory subsystem command input queue having status locations for resolving conflicts
    Patent number: 5388222
    Abstract: Methodology and circuitry for managing read and write commands from nodes to a shared memory resource on a common data bus, including nodes with write-back caches, nodes with write-through caches and nodes without caches.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: February 7, 1995
    Assignee: Digital Equipment Corporation
    Inventors: Lawrence A. P. Chisvin, John K. Grooms, Joseph F. Rantala, David W. Hartwell