Abstract: Disclosed herein are testing apparatus and methods to identify latent defects in IC devices based on capacitive coupling between bond wires. Bond wires may have latent defects that do not appear as hard shorts or hard opens at the time of testing, but may pose a high risk of developing into hard shorts or hard opens over time. A latent defect may form when two adjacent bond wires are disturbed to become close to each other. According to some embodiments, capacitive coupling between a pair of pins may be used to provide an indication of a near-short latent defect between bond wires connected to the pair of pins.

Abstract: Disclosed herein are testing apparatus and methods to identify latent defects in IC devices based on capacitive coupling between bond wires. Bond wires may have latent defects that do not appear as hard shorts or hard opens at the time of testing, but may pose a high risk of developing into hard shorts or hard opens over time. A latent defect may form when two adjacent bond wires are disturbed to become close to each other. According to some embodiments, capacitive coupling between a pair of pins may be used to provide an indication of a near-short latent defect between bond wires connected to the pair of pins.

Abstract: An example test fixture, which interfaces a tester and a unit under test (UUT), includes the following: first electrical contacts that face the tester; second electrical contacts that face the UUT; a substrate made of sections of printed first material, with the first material being electrically non-conductive, and with the substrate being between the first electrical contacts and the second electrical contacts; and structures through the substrate, with the structures including sections of second material, with the second material being electrically conductive, and with at least one of the structures electrically connecting a first electrical contact and a second electrical contact.

Abstract: An example test fixture, which interfaces a tester and a unit under test (UUT), includes the following: first electrical contacts that face the tester; second electrical contacts that face the UUT; a substrate made of sections of printed first material, with the first material being electrically non-conductive, and with the substrate being between the first electrical contacts and the second electrical contacts; and structures through the substrate, with the structures including sections of second material, with the second material being electrically conductive, and with at least one of the structures electrically connecting a first electrical contact and a second electrical contact.