Abstract: A class-G amplifier comprises first, second and third terminals connected to a load, first supply voltage (V.sub.1) and second supply voltage (V.sub.2), respectively, where V.sub.2 >V.sub.1. First (T.sub.1) and second (T.sub.2) transistors are series-connected between the first and third terminals with the collector of T.sub.1 coupled via first diode (D.sub.1) to the second terminal. A third emitter follower transistor (T.sub.3) has a B/E junction coupled between a signal input terminal and base of T.sub.1. A first current source (5) couples the third terminal and third transistor. A driver circuit includes a first current path between the third terminal and emitter of T.sub.3 comprising, in series, a second current source (7), a fourth transistor (T.sub.5) and second diode (D.sub.4). A second current path between a junction point (3) and common point (11) comprises, in series, third (D.sub.2) and fourth (D.sub.3) diodes and a third current source (8).

Abstract: A high-efficiency class-G type amplifier comprises a first transistor (T.sub.1), having its collector connected to a first supply voltage (V.sub.1) via a first diode (D.sub.1) and a second transistor (T.sub.2), connected in series with the first transistor and which has its collector connected to a second supply voltage (V.sub.2). The series arrangement of a second (D.sub.2), a third (D.sub.3) and a fourth diode (D.sub.4) is connected between the bases of the first and the second transistor (T.sub.1, T.sub.2) the fourth diode (D.sub.4) is poled in a direction opposite to that of the second (D.sub.2) and the third diode (D.sub.3). The series arrangement of a first resistor (R.sub.1) and the emitter-collector path of a first current-source transistor (T.sub.4) connects the second supply voltage to the anode of the fourth diode (D.sub.4). The junction point (5) between the first resistor (R.sub.1) and the current-source transistor (T.sub.4) is connected to the output (2) by means of a capacitor (C.sub.1).

Abstract: A high efficiency class-G amplifier comprises first (2), second (4) and third (10) terminals connected to a load, a first (V.sub.1) and second (V.sub.2) supply voltage, respectively, where voltage V.sub.2 >V.sub.1. First (T.sub.1) and second (T.sub.2) transistors are serially connected between the first and third terminals. A third transistor (T.sub.3, emitter-follower) couples a signal input terminal (6) to the base of the first transistor. A first diode (D.sub.1) connects the collector of T.sub.1 to the second terminal. A driver circuit includes a current path between the third terminal and a common terminal (11) having, in series, a first current source (7), second (D.sub.2) and third (D.sub.3) diodes and a second current source (8). A fourth diode (D.sub.4) connects junction point 3 to junction point 9. A fifth diode (D.sub.5) connects the emitter of the third transistor to the second current source.